[PATCH 0/2] Add TRNG node for x1e80100 SoC

[PATCH 0/2] Add TRNG node for x1e80100 SoC

[Harshal Dev]

Add device-tree nodes to enable TRNG for x1e80100 SoC

Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
Harshal Dev (2):
      dt-bindings: crypto: qcom,prng: document x1e80100
      arm64: dts: qcom: x1e80100: add TRNG node

 Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
 arch/arm64/boot/dts/qcom/x1e80100.dtsi                  | 5 +++++
 2 files changed, 6 insertions(+)
---
base-commit: d13f3ac64efb868d09cb2726b1e84929afe90235
change-id: 20251124-trng_dt_binding_x1e80100-94ec1f83142b

Best regards,
-- 
Harshal Dev <harshal.dev@oss.qualcomm.com>

[PATCH 1/2] dt-bindings: crypto: qcom,prng: document x1e80100

[Harshal Dev]

Document x1e80100 compatible for the True Random Number Generator.

Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
index ed7e16bd11d3..aa3c097a6acd 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
@@ -29,6 +29,7 @@ properties:
               - qcom,sm8550-trng
               - qcom,sm8650-trng
               - qcom,sm8750-trng
+              - qcom,x1e80100-trng
           - const: qcom,trng
 
   reg:

-- 
2.25.1

[PATCH 2/2] arm64: dts: qcom: x1e80100: add TRNG node

[Harshal Dev]

The x1e80100 SoC has a True Random Number Generator, add the node with
the correct compatible set.

Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 51576d9c935d..c17c02c347be 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3033,6 +3033,11 @@ usb_1_ss2_qmpphy_dp_in: endpoint {
 			};
 		};
 
+		rng: rng@10c3000 {
+			compatible = "qcom,x1e80100-trng", "qcom,trng";
+			reg = <0x0 0x10c3000 0x0 0x1000>;
+		};
+
 		cnoc_main: interconnect@1500000 {
 			compatible = "qcom,x1e80100-cnoc-main";
 			reg = <0 0x01500000 0 0x14400>;

-- 
2.25.1

Re: [PATCH 1/2] dt-bindings: crypto: qcom,prng: document x1e80100

[Krzysztof Kozlowski]

On 24/11/2025 18:08, Harshal Dev wrote:
> Document x1e80100 compatible for the True Random Number Generator.
> 
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

Re: [PATCH 2/2] arm64: dts: qcom: x1e80100: add TRNG node

[Dmitry Baryshkov]

On Mon, Nov 24, 2025 at 10:38:50PM +0530, Harshal Dev wrote:
> The x1e80100 SoC has a True Random Number Generator, add the node with
> the correct compatible set.
> 
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/x1e80100.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry

Re: [PATCH 0/2] Add TRNG node for x1e80100 SoC

[Wenjia Zhang]

On 11/25/2025 1:08 AM, Harshal Dev wrote:
> Add device-tree nodes to enable TRNG for x1e80100 SoC
>
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
> ---
> Harshal Dev (2):
>        dt-bindings: crypto: qcom,prng: document x1e80100
>        arm64: dts: qcom: x1e80100: add TRNG node
>
>   Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
>   arch/arm64/boot/dts/qcom/x1e80100.dtsi                  | 5 +++++
>   2 files changed, 6 insertions(+)
> ---
> base-commit: d13f3ac64efb868d09cb2726b1e84929afe90235
> change-id: 20251124-trng_dt_binding_x1e80100-94ec1f83142b
>
> Best regards,

Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> # on x1e80100

root@ubuntu:/usr/Testools# cat /sys/class/misc/hw_random/rng_available
smccc_trng qcom_hwrng
root@ubuntu:/usr/Testools# cat /sys/class/misc/hw_random/rng_current
smccc_trng
root@ubuntu:/usr/Testools# echo qcom_hwrng > /sys/class/misc/hw_random/rng_current
root@ubuntu:/usr/Testools# cat /sys/class/misc/hw_random/rng_current
qcom_hwrng
root@ubuntu:/usr/Testools# cat /dev/random | rngtest -c 1000
rngtest 6.15
Copyright (c) 2004 by Henrique de Moraes Holschuh
This is free software; see the source for copying conditions.  There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

rngtest: starting FIPS tests...
rngtest: bits received from input: 20000032
rngtest: FIPS 140-2 successes: 1000
rngtest: FIPS 140-2 failures: 0
rngtest: FIPS 140-2(2001-10-10) Monobit: 0
rngtest: FIPS 140-2(2001-10-10) Poker: 0
rngtest: FIPS 140-2(2001-10-10) Runs: 0
rngtest: FIPS 140-2(2001-10-10) Long run: 0
rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
rngtest: input channel speed: (min=2.328; avg=12.908; max=9.313)Gibits/s
rngtest: FIPS tests speed: (min=123.854; avg=204.373; max=254.313)Mibits/s
rngtest: Program run time: 94908 microseconds

Regards,
Wenjia