[PATCH v2 0/6] arm64: Introduce Axera AX650 SoC and AX650 Demo board

[PATCH v2 0/6] arm64: Introduce Axera AX650 SoC and AX650 Demo board

[Leng Honglin]

Axera AX650 is an Arm64 SoC developed by Axera Semiconductor. The
AX650 Demo board is based on the AX650 SoC and provides the hardware
platform used to validate this series.

This series adds the initial upstream support required to build and
boot the Linux kernel on the AX650 Demo board.

The initial platform support includes:

- Axera AX650 SoC and AX650 Demo devicetree bindings
- ARCH_AXERA arm64 platform selection
- arm64 defconfig support
- Cortex-A55 CPUs and PSCI
- GIC-400 interrupt controller
- ARMv8 architectural timer
- Cortex-A55 PMU
- UART console
- 8 GiB system memory
- Axera ARM64 SoC maintainer information

The patches are organized as follows:

- Patch 1/6: Add the Axera vendor prefix.
- Patch 2/6: Add devicetree bindings for the AX650 SoC and
  AX650 Demo board.
- Patch 3/6: Add the ARCH_AXERA arm64 platform option.
- Patch 4/6: Enable ARCH_AXERA in the arm64 defconfig.
- Patch 5/6: Add the initial devicetree description for the AX650 SoC
  and AX650 Demo board.
- Patch 6/6: Add Axera ARM64 SoC entries to MAINTAINERS.

The series is intentionally limited to the minimum platform support
required to boot the board with a serial console. Additional
peripherals will be added in subsequent patches.

The platform was tested on an AX650 Demo board using the vendor boot
chain to load the kernel and device tree. A kernel with an embedded
initramfs successfully reached an interactive shell on the serial
console, and all 8 CPUs were brought online.

Validation performed:

- DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/axera.yaml make ARCH=arm64 dt_binding_check
- make ARCH=arm64 CHECK_DTBS=y W=1 axera/ax650-demo.dtb
- scripts/dtc/dt-check-style --mode=strict on both AX650 DTS files

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
Changes in v2:
- Fix the GIC node placement and unit address in the AX650 SoC device tree.
- Correct the GICC register region size to 0x2000.
- Fix DTS property ordering and formatting, and remove a duplicate include.
- Expand the AX650 device-tree commit message with platform and test details.
- Remove the unverified Reviewed-by tags.
- Add the official Axera website link to the vendor-prefix commit.

Link to v1:
https://patch.msgid.link/20260821-ax650-v1-v1-0-e1b013938e6b@axera-tech.com

To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Shi Zhicheng <shizhicheng@axera-tech.com>
To: Leng Honglin <lenghonglin@axera-tech.com>
To: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>
To: Krzysztof Kozlowski <krzk@kernel.org>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Linus Walleij <linusw@kernel.org>
To: Drew Fustini <fustini@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: soc@lists.linux.dev
Cc: hlleng233@gmail.com

---
Leng Honglin (6):
      dt-bindings: vendor-prefixes: add Axera
      dt-bindings: arm: add Axera AX650 SoC and AX650 Demo board
      arm64: Kconfig.platforms: add ARCH_AXERA
      arm64: defconfig: enable ARCH_AXERA
      arm64: dts: axera: add AX650 Demo initial support
      MAINTAINERS: add Axera ARM SoC support

 Documentation/devicetree/bindings/arm/axera.yaml   |  24 ++++
 .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
 MAINTAINERS                                        |   8 ++
 arch/arm64/Kconfig.platforms                       |   5 +
 arch/arm64/boot/dts/Makefile                       |   1 +
 arch/arm64/boot/dts/axera/Makefile                 |   3 +
 arch/arm64/boot/dts/axera/ax650-demo.dts           |  30 +++++
 arch/arm64/boot/dts/axera/ax650.dtsi               | 136 +++++++++++++++++++++
 arch/arm64/configs/defconfig                       |   1 +
 9 files changed, 210 insertions(+)
---
base-commit: ff68e5f557f69a08fdcfa4ce8b1b809d63bd4f45
change-id: 20260818-ax650-v1-9f5c1965d1e6

Best regards,
--  
Leng Honglin <lenghonglin@axera-tech.com>

[PATCH v2 1/6] dt-bindings: vendor-prefixes: add Axera

[Leng Honglin]

Add the Axera Semiconductor vendor prefix for devicetree bindings.

For more information, visit the official Axera Semiconductor website:
Chinese site: https://www.axera-tech.com/
English site: https://www.axera-tech.com/en

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 396044f368e7..1dbafe682724 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -219,6 +219,8 @@ patternProperties:
     description: Shanghai Awinic Technology Co., Ltd.
   "^axentia,.*":
     description: Axentia Technologies AB
+  "^axera,.*":
+    description: Axera Semiconductor Co., Ltd.
   "^axiado,.*":
     description: Axiado Corporation
   "^axis,.*":

-- 
2.34.1

Re: [PATCH v2 1/6] dt-bindings: vendor-prefixes: add Axera

[Krzysztof Kozlowski]

On Tue, Sep 01, 2026 at 05:19:28PM +0800, Leng Honglin wrote:
> Add the Axera Semiconductor vendor prefix for devicetree bindings.
> 
> For more information, visit the official Axera Semiconductor website:
> Chinese site: https://www.axera-tech.com/
> English site: https://www.axera-tech.com/en
> 
> Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
> ---
>  Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index 396044f368e7..1dbafe682724 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -219,6 +219,8 @@ patternProperties:
>      description: Shanghai Awinic Technology Co., Ltd.
>    "^axentia,.*":
>      description: Axentia Technologies AB
> +  "^axera,.*":

So how did you implement own comment?

Best regards,
Krzysztof

Re: [PATCH v2 1/6] dt-bindings: vendor-prefixes: add Axera

[冷红林]

On 9/3/2026 8:39 PM, Krzysztof Kozlowski wrote:
> On Tue, Sep 01, 2026 at 05:19:28PM +0800, Leng Honglin wrote:
>> Add the Axera Semiconductor vendor prefix for devicetree bindings.
>>
>> For more information, visit the official Axera Semiconductor website:
>> Chinese site: https://www.axera-tech.com/
>> English site: https://www.axera-tech.com/en
>>
>> Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
>> ---
>>  Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
>> index 396044f368e7..1dbafe682724 100644
>> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
>> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
>> @@ -219,6 +219,8 @@ patternProperties:
>>      description: Shanghai Awinic Technology Co., Ltd.
>>    "^axentia,.*":
>>      description: Axentia Technologies AB
>> +  "^axera,.*":
> 
> So how did you implement own comment?
> 
> Best regards,
> Krzysztof

Hi Krzysztof,

I sincerely apologize for the confusion. In my previous reply, I did
promise to change the prefix to "axera-tech" to align with our domain
name. I should have explained my change of mind in the v2 patch notes.

When I started making the changes internally for v2, I realized that
our existing BSPs, bootloaders, and a large amount of downstream
codebase already heavily rely on the "axera,*" prefix for compatible
strings. Changing it to "axera-tech" now would cause massive breakage
and compatibility issues across our existing ecosystem.

Because of this historical legacy, I looked for similar cases in the
upstream bindings and noticed that there are accepted precedents where
the prefix reflects the core brand rather than the full domain (for
example, "^cix,.*" for cixtech.com).

Would it be acceptable to keep "axera" as the prefix to preserve
compatibility with our existing deployed systems, even though our
domain is axera-tech.com?

If this is strictly not allowed, we will have to figure out a
migration path internally, but preserving "axera" would be highly
preferable for our ecosystem. I am very sorry again for not clarifying
this earlier.

Best regards,
Leng

Re: [PATCH v2 1/6] dt-bindings: vendor-prefixes: add Axera

[Krzysztof Kozlowski]

On 07/09/2026 09:12, 冷红林 wrote:
> On 9/3/2026 8:39 PM, Krzysztof Kozlowski wrote:
>> On Tue, Sep 01, 2026 at 05:19:28PM +0800, Leng Honglin wrote:
>>> Add the Axera Semiconductor vendor prefix for devicetree bindings.
>>>
>>> For more information, visit the official Axera Semiconductor website:
>>> Chinese site: https://www.axera-tech.com/
>>> English site: https://www.axera-tech.com/en
>>>
>>> Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
>>> ---
>>>  Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
>>>  1 file changed, 2 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
>>> index 396044f368e7..1dbafe682724 100644
>>> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
>>> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
>>> @@ -219,6 +219,8 @@ patternProperties:
>>>      description: Shanghai Awinic Technology Co., Ltd.
>>>    "^axentia,.*":
>>>      description: Axentia Technologies AB
>>> +  "^axera,.*":
>>
>> So how did you implement own comment?
>>
>> Best regards,
>> Krzysztof
> 
> Hi Krzysztof,
> 
> I sincerely apologize for the confusion. In my previous reply, I did
> promise to change the prefix to "axera-tech" to align with our domain
> name. I should have explained my change of mind in the v2 patch notes.
> 
> When I started making the changes internally for v2, I realized that
> our existing BSPs, bootloaders, and a large amount of downstream
> codebase already heavily rely on the "axera,*" prefix for compatible
> strings. Changing it to "axera-tech" now would cause massive breakage
> and compatibility issues across our existing ecosystem.

Did this existing downstream codebase receive DT maintainers ack or review?

I checked and it seems it is first time you ask:
https://lore.kernel.org/all/?q=dfn%3Avendor-prefixes.yaml+axera

Whatever you have downstream is Axera's fault. You should have come
earlier. Otherwise everyone will produce whatever stuff (including total
junk) in downstream and then say that it is an effort to align to
upstream. And I saw this argument more than once.


> 
> Because of this historical legacy, I looked for similar cases in the
> upstream bindings and noticed that there are accepted precedents where
> the prefix reflects the core brand rather than the full domain (for
> example, "^cix,.*" for cixtech.com).

Indeed cix should use cixtech.


> 
> Would it be acceptable to keep "axera" as the prefix to preserve
> compatibility with our existing deployed systems, even though our
> domain is axera-tech.com?
> 
> If this is strictly not allowed, we will have to figure out a
> migration path internally, but preserving "axera" would be highly
> preferable for our ecosystem. I am very sorry again for not clarifying
> this earlier.

Axera is fine, I don't see conflicts with other possible vendors, but
the problem is that if I agree now, next months someone will use this as
an argument for their patchset that "cix" and "axera" were allowed, so
they also deserve exception because they never cared to ask upstream
before. So obviously based on your earlier reason, of using past mistake
or exception, I should not really agree on that one. Therefore fine by
me, but please get an Ack from different DT maintainer.



Best regards,
Krzysztof

[PATCH v2 2/6] dt-bindings: arm: add Axera AX650 SoC and AX650 Demo board

[Leng Honglin]

Add devicetree bindings for the Axera AX650 SoC and AX650 Demo board.

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
 Documentation/devicetree/bindings/arm/axera.yaml | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/axera.yaml b/Documentation/devicetree/bindings/arm/axera.yaml
new file mode 100644
index 000000000000..28bf0ce9fd27
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/axera.yaml
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/axera.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Axera platforms
+
+maintainers:
+  - Shi Zhicheng <shizhicheng@axera-tech.com>
+  - Leng Honglin <lenghonglin@axera-tech.com>
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - items:
+          - const: axera,ax650-demo
+          - const: axera,ax650
+
+additionalProperties: true
+
+...

-- 
2.34.1

Re: [PATCH v2 2/6] dt-bindings: arm: add Axera AX650 SoC and AX650 Demo board

[Krzysztof Kozlowski]

On Tue, Sep 01, 2026 at 05:19:29PM +0800, Leng Honglin wrote:
> Add devicetree bindings for the Axera AX650 SoC and AX650 Demo board.
> 
> Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
> ---
>  Documentation/devicetree/bindings/arm/axera.yaml | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 

No replies to my comment on patch #1, so dropping this from DT Patchwork.

Best regards,
Krzysztof

[PATCH v2 3/6] arm64: Kconfig.platforms: add ARCH_AXERA

[Leng Honglin]

Enable the ARCH_AXERA platform option for Axera arm64 platforms.

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
 arch/arm64/Kconfig.platforms | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index d2acfac73003..a6f2f009461e 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -54,6 +54,11 @@ config ARCH_ASPEED
 	  This enables support for ASPEED's SoC family, such as the
 	  ast27XX 8th generation Baseboard Management Controller (BMC).
 
+config ARCH_AXERA
+	bool "Axera SoC family"
+	help
+	  This enables support for the Axera SoC family.
+
 config ARCH_AXIADO
 	bool "Axiado SoC Family"
 	select GPIOLIB

-- 
2.34.1

[PATCH v2 4/6] arm64: defconfig: enable ARCH_AXERA

[Leng Honglin]

Enable ARCH_AXERA in the arm64 defconfig.

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 654a102cb5bc..a2c2b41f0146 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -40,6 +40,7 @@ CONFIG_ARCH_ALPINE=y
 CONFIG_ARCH_APPLE=y
 CONFIG_ARCH_ARTPEC=y
 CONFIG_ARCH_ASPEED=y
+CONFIG_ARCH_AXERA=y
 CONFIG_ARCH_AXIADO=y
 CONFIG_ARCH_BCM=y
 CONFIG_ARCH_BCM2835=y

-- 
2.34.1

[PATCH v2 5/6] arm64: dts: axera: add AX650 Demo initial support

[Leng Honglin]

Axera AX650 is an Arm64 SoC developed by Axera Semiconductor. The
AX650 Demo board is based on the AX650 SoC and provides the hardware
platform used to validate this initial support.

Add the initial device tree description required to boot Linux on the
AX650 Demo board. The SoC description includes eight Cortex-A55 CPUs
booted through PSCI, the GIC-400 interrupt controller, the ARMv8
architectural timer, the Cortex-A55 PMU, and the DesignWare APB UART
used for the serial console.

The board description provides 8 GiB of system memory, the serial0
alias, and the stdout path for the console.

The platform was tested on an AX650 Demo board using the vendor boot
chain to load the kernel and device tree. A kernel with an embedded
initramfs reached an interactive shell on the serial console, and all
8 CPUs were brought online.

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
 arch/arm64/boot/dts/Makefile             |   1 +
 arch/arm64/boot/dts/axera/Makefile       |   3 +
 arch/arm64/boot/dts/axera/ax650-demo.dts |  30 +++++++
 arch/arm64/boot/dts/axera/ax650.dtsi     | 136 +++++++++++++++++++++++++++++++
 4 files changed, 170 insertions(+)

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index fc726b215f12..93740acb553d 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -10,6 +10,7 @@ subdir-y += apm
 subdir-y += apple
 subdir-y += arm
 subdir-y += aspeed
+subdir-y += axera
 subdir-y += axiado
 subdir-y += bitmain
 subdir-y += blaize
diff --git a/arch/arm64/boot/dts/axera/Makefile b/arch/arm64/boot/dts/axera/Makefile
new file mode 100644
index 000000000000..76f436a9466a
--- /dev/null
+++ b/arch/arm64/boot/dts/axera/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+dtb-$(CONFIG_ARCH_AXERA) += ax650-demo.dtb
diff --git a/arch/arm64/boot/dts/axera/ax650-demo.dts b/arch/arm64/boot/dts/axera/ax650-demo.dts
new file mode 100644
index 000000000000..d8690287bfcd
--- /dev/null
+++ b/arch/arm64/boot/dts/axera/ax650-demo.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Axera Semiconductor Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "ax650.dtsi"
+
+/ {
+	compatible = "axera,ax650-demo", "axera,ax650";
+	model = "Axera AX650 Demo";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	memory@100000000 {
+		reg = <0x1 0x00000000 0x2 0x00000000>;
+		device_type = "memory";
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/axera/ax650.dtsi b/arch/arm64/boot/dts/axera/ax650.dtsi
new file mode 100644
index 000000000000..38547df8b619
--- /dev/null
+++ b/arch/arm64/boot/dts/axera/ax650.dtsi
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Axera Semiconductor Co., Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	#address-cells = <2>;
+	interrupt-parent = <&gic>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "arm,cortex-a55";
+			reg = <0x0>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@100 {
+			compatible = "arm,cortex-a55";
+			reg = <0x100>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@200 {
+			compatible = "arm,cortex-a55";
+			reg = <0x200>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@300 {
+			compatible = "arm,cortex-a55";
+			reg = <0x300>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu4: cpu@400 {
+			compatible = "arm,cortex-a55";
+			reg = <0x400>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu5: cpu@500 {
+			compatible = "arm,cortex-a55";
+			reg = <0x500>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu6: cpu@600 {
+			compatible = "arm,cortex-a55";
+			reg = <0x600>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+
+		cpu7: cpu@700 {
+			compatible = "arm,cortex-a55";
+			reg = <0x700>;
+			device_type = "cpu";
+			enable-method = "psci";
+		};
+	};
+
+	pmu {
+		compatible = "arm,cortex-a55-pmu";
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
+				     <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		uart0: serial@2016000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x02016000 0x0 0x400>;
+			clock-frequency = <200000000>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+
+			status = "disabled";
+		};
+
+		/* GIC-400 register frames start at offset 0x1000. */
+		gic: interrupt-controller@4901000 {
+			compatible = "arm,gic-400";
+			reg = <0x0 0x4901000 0x0 0x1000>,
+			      <0x0 0x4902000 0x0 0x2000>,
+			      <0x0 0x4904000 0x0 0x2000>,
+			      <0x0 0x4906000 0x0 0x2000>;
+			#address-cells = <0>;
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			interrupts = <GIC_PPI 9
+				     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+};

-- 
2.34.1

[PATCH v2 6/6] MAINTAINERS: add Axera ARM SoC support

[Leng Honglin]

Add maintainers and file patterns for Axera AX650 ARM64 support.

Signed-off-by: Leng Honglin <lenghonglin@axera-tech.com>
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index b7094a616afd..b3ac89227856 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4398,6 +4398,14 @@ S:	Orphan
 F:	Documentation/devicetree/bindings/sound/axentia,*
 F:	sound/soc/atmel/tse850-pcm5142.c
 
+AXERA ARM64 SOC SUPPORT
+M:	Shi Zhicheng <shizhicheng@axera-tech.com>
+M:	Leng Honglin <lenghonglin@axera-tech.com>
+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:	Maintained
+F:	Documentation/devicetree/bindings/arm/axera.yaml
+F:	arch/arm64/boot/dts/axera/
+
 AXIS ARTPEC ARM64 SoC SUPPORT
 M:	Jesper Nilsson <jesper.nilsson@axis.com>
 M:	Lars Persson <lars.persson@axis.com>

-- 
2.34.1