* [PATCH v4 1/6] dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
@ 2025-07-17 10:37 ` Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 2/6] arm64: dts: " Jonas Karlman
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Jonas Karlman @ 2025-07-17 10:37 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, Nicolas Frattaroli, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman,
Krzysztof Kozlowski
The ROCK 2A and ROCK 2F is a high-performance single board computer
developed by Radxa, based on the Rockchip RK3528A SoC.
Add devicetree binding documentation for the Radxa ROCK 2A and ROCK 2F
boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
v4: No change
v3: Collect a-b tag
v2: No change
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 28db6bd6aa5b..c5690098f2ed 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -881,6 +881,13 @@ properties:
- const: radxa,rock
- const: rockchip,rk3188
+ - description: Radxa ROCK 2A/2F
+ items:
+ - enum:
+ - radxa,rock-2a
+ - radxa,rock-2f
+ - const: rockchip,rk3528
+
- description: Radxa ROCK Pi 4A/A+/B/B+/C
items:
- enum:
--
2.50.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v4 2/6] arm64: dts: rockchip: Add Radxa ROCK 2A/2F
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 1/6] dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F Jonas Karlman
@ 2025-07-17 10:37 ` Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 3/6] dt-bindings: arm: rockchip: Add ArmSoM Sige1 Jonas Karlman
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Jonas Karlman @ 2025-07-17 10:37 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, Nicolas Frattaroli, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
The ROCK 2A and ROCK 2F is a high-performance single board computer
developed by Radxa, based on the Rockchip RK3528A SoC.
Add initial device tree for the Radxa ROCK 2A and ROCK 2F boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
v4: Collect r-b and t-b tags
v3: Rename led nodes to led-0/led-1 (Chukun Pan)
v2: Limit sdmmc max-frequency to 100 MHz (Yao Zi)
Schematics:
- https://dl.radxa.com/rock2/2a/v1.2/radxa_rock_2a_v1.2_schematic.pdf
- https://dl.radxa.com/rock2/2f/radxa_rock2f_v1.01_schematic.pdf
---
arch/arm64/boot/dts/rockchip/Makefile | 2 +
.../boot/dts/rockchip/rk3528-rock-2.dtsi | 293 ++++++++++++++++++
.../boot/dts/rockchip/rk3528-rock-2a.dts | 82 +++++
.../boot/dts/rockchip/rk3528-rock-2f.dts | 10 +
4 files changed, 387 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 099520962ffb..4cb6106b16f2 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -90,6 +90,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2f.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg-arc-s.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
new file mode 100644
index 000000000000..aedc7ee9ee46
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
@@ -0,0 +1,293 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3528.dtsi"
+
+/ {
+ aliases {
+ i2c1 = &i2c1;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "MASKROM";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_led_b>;
+
+ led-0 {
+ color = <LED_COLOR_ID_BLUE>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vdd_0v9: regulator-0v9-vdd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: regulator-1v1-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v8: regulator-1v8-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc_3v3: regulator-3v3-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_wifi: regulator-3v3-vcc-wifi {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_wifi_pwr>;
+ regulator-name = "vcc_wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_sys: regulator-5v0-vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v0_usb20: regulator-5v0-vcc-usb20 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_en>;
+ regulator-name = "vcc5v0_usb20";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vccio_sd: regulator-vccio-sd {
+ compatible = "regulator-gpio";
+ gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ states = <1800000 0x0>, <3300000 0x1>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_arm: regulator-vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <746000>;
+ regulator-max-microvolt = <1201000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ vdd_logic: regulator-vdd-logic {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <705000>;
+ regulator-max-microvolt = <1006000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ rfkill {
+ compatible = "rfkill-gpio";
+ label = "rfkill-wlan";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_reg_on_h>;
+ radio-type = "wlan";
+ shutdown-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m0_xfer>;
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "belling,bl24c16a", "atmel,24c16";
+ reg = <0x50>;
+ pagesize = <16>;
+ read-only;
+ vcc-supply = <&vcc_3v3>;
+ };
+};
+
+&pinctrl {
+ bluetooth {
+ bt_wake_host_h: bt-wake-host-h {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ host_wake_bt_h: host-wake-bt-h {
+ rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ state_led_b: state-led-b {
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_host_en: usb-host-en {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ usb_wifi_pwr: usb-wifi-pwr {
+ rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_reg_on_h: wifi-reg-on-h {
+ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_wake_host_h: wifi-wake-host-h {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1m0_pins>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2m0_pins>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <100000000>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0m0_xfer>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
new file mode 100644
index 000000000000..c03ae1dd3456
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3528-rock-2.dtsi"
+
+/ {
+ model = "Radxa ROCK 2A";
+ compatible = "radxa,rock-2a", "rockchip,rk3528";
+
+ aliases {
+ ethernet0 = &gmac1;
+ };
+
+ vcc5v0_usb30_otg: regulator-5v0-vcc-usb30-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg_en>;
+ regulator-name = "vcc5v0_usb30_otg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+ status = "okay";
+};
+
+&leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_led_b>, <&sys_led_g>;
+
+ led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+};
+
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_rstn_l>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ ethernet {
+ gmac1_rstn_l: gmac1-rstn-l {
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ sys_led_g: sys-led-g {
+ rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_otg_en: usb-otg-en {
+ rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
new file mode 100644
index 000000000000..3e2b9b685cb2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3528-rock-2.dtsi"
+
+/ {
+ model = "Radxa ROCK 2F";
+ compatible = "radxa,rock-2f", "rockchip,rk3528";
+};
--
2.50.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v4 3/6] dt-bindings: arm: rockchip: Add ArmSoM Sige1
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 1/6] dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 2/6] arm64: dts: " Jonas Karlman
@ 2025-07-17 10:37 ` Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 4/6] arm64: dts: " Jonas Karlman
` (4 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Jonas Karlman @ 2025-07-17 10:37 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, Nicolas Frattaroli, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman,
Krzysztof Kozlowski
The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.
Add devicetree binding documentation for the ArmSoM Sige1 board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
v4: No change
v3: Collect a-b tag
v2: No change
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index c5690098f2ed..43f6403ecad6 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -54,6 +54,11 @@ properties:
- const: ariaboard,photonicat
- const: rockchip,rk3568
+ - description: ArmSoM Sige1 board
+ items:
+ - const: armsom,sige1
+ - const: rockchip,rk3528
+
- description: ArmSoM Sige5 board
items:
- const: armsom,sige5
--
2.50.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v4 4/6] arm64: dts: rockchip: Add ArmSoM Sige1
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
` (2 preceding siblings ...)
2025-07-17 10:37 ` [PATCH v4 3/6] dt-bindings: arm: rockchip: Add ArmSoM Sige1 Jonas Karlman
@ 2025-07-17 10:37 ` Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 5/6] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2 Jonas Karlman
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Jonas Karlman @ 2025-07-17 10:37 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, Nicolas Frattaroli, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.
Add initial device tree for the ArmSoM Sige1 board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v4:
- Remove disable-wp prop from sdio0 (Chukun Pan)
Changes in v3:
- Rename led nodes to led-0/led-1 (Chukun Pan)
- Remove pinctrl* props from sdio0 (Chukun Pan)
Changes in v2:
- Drop regulator-boot-on from usb 2.0 host regulators (Chukun Pan)
- Change rfkill to sdio-pwrseq (Chukun Pan)
- Drop clock-output-names prop from rtc node (Chukun Pan)
- Add bluetooth and wifi nodes (Chukun Pan)
- Enable use of DMA for bluetooth on uart2
Schematics: https://drive.google.com/drive/folders/15uvc2lcOAKP0enXezASUhVFLuzkq3IEX
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3528-armsom-sige1.dts | 464 ++++++++++++++++++
2 files changed, 465 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 4cb6106b16f2..206fb8572cf7 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-screen.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2f.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
new file mode 100644
index 000000000000..6e21579365a5
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
@@ -0,0 +1,464 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3528.dtsi"
+
+/ {
+ model = "ArmSoM Sige1";
+ compatible = "armsom,sige1", "rockchip,rk3528";
+
+ aliases {
+ ethernet0 = &gmac1;
+ i2c0 = &i2c0;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ mmc2 = &sdio0;
+ serial0 = &uart0;
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "MASKROM";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&g_led>, <&r_led>;
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_RED>;
+ default-state = "on";
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ vcc0v6_ddr: regulator-0v6-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc0v6_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <600000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_0v9: regulator-0v9-vdd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: regulator-1v1-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v8: regulator-1v8-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc1v8_ddr: regulator-1v8-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_3v3: regulator-3v3-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_dcin>;
+ };
+
+ vcc3v3_sd: regulator-3v3-vcc-sd {
+ compatible = "regulator-fixed";
+ gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwren_l>;
+ regulator-name = "vcc3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_sys: regulator-5v0-vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_dcin>;
+ };
+
+ vcc5v0_usb1_host: regulator-5v0-vcc-usb1-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb20_host1_drv_h>;
+ regulator-name = "vcc5v0_usb1_host";
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb2_host: regulator-5v0-vcc-usb2-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb20_host2_drv_h>;
+ regulator-name = "vcc5v0_usb2_host";
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb_otg: regulator-5v0-vcc-usb-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb20_otg0_drv_h>;
+ regulator-name = "vcc5v0_usb_otg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_dcin: regulator-vcc-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vccio_sd: regulator-vccio-sd {
+ compatible = "regulator-gpio";
+ gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ states = <1800000 0x0>, <3300000 0x1>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_arm: regulator-vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm3 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <746000>;
+ regulator-max-microvolt = <1201000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ vdd_logic: regulator-vdd-logic {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <705000>;
+ regulator-max-microvolt = <1006000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_reg_on_h>, <&clkm1_32k_out>;
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m0_xfer>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int_l>;
+ wakeup-source;
+ };
+};
+
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_rstn_l>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ bluetooth {
+ bt_reg_on_h: bt-reg-on-h {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_host_h: bt-wake-host-h {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ host_wake_bt_h: host-wake-bt-h {
+ rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ethernet {
+ gmac1_rstn_l: gmac1-rstn-l {
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ g_led: g-led {
+ rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ r_led: r-led {
+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtc {
+ rtc_int_l: rtc-int-l {
+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sdmmc_pwren_l: sdmmc-pwren-l {
+ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb20_host1_drv_h: usb20-host1-drv-h {
+ rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usb20_host2_drv_h: usb20-host2-drv-h {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usb20_otg0_drv_h: usb20-otg0-drv-h {
+ rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ wifi_reg_on_h: wifi-reg-on-h {
+ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_wake_host_h: wifi-wake-host-h {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2m0_pins>;
+ status = "okay";
+};
+
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3m0_pins>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ clocks = <&cru CLK_DEEPSLOW>;
+ clock-names = "lpo";
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PA7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake_host_h>;
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0m0_xfer>;
+ status = "okay";
+};
+
+&uart2 {
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&cru CLK_DEEPSLOW>;
+ clock-names = "lpo";
+ device-wakeup-gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PC2 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wakeup";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_reg_on_h>, <&bt_wake_host_h>, <&host_wake_bt_h>;
+ shutdown-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+ vbat-supply = <&vcc_3v3>;
+ vddio-supply = <&vcc_1v8>;
+ };
+};
--
2.50.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v4 5/6] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
` (3 preceding siblings ...)
2025-07-17 10:37 ` [PATCH v4 4/6] arm64: dts: " Jonas Karlman
@ 2025-07-17 10:37 ` Jonas Karlman
2025-07-17 10:37 ` [PATCH v4 6/6] arm64: dts: " Jonas Karlman
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Jonas Karlman @ 2025-07-17 10:37 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, Nicolas Frattaroli, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman,
Krzysztof Kozlowski
The NanoPi Zero2 is small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.
Add devicetree binding documentation for the FriendlyElec NanoPi Zero2
board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
v4: No change
v3: Collect a-b tag
v2: No change
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 43f6403ecad6..e3d3d483de4a 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -325,6 +325,11 @@ properties:
- friendlyarm,nanopi-r6s
- const: rockchip,rk3588s
+ - description: FriendlyElec NanoPi Zero2
+ items:
+ - const: friendlyarm,nanopi-zero2
+ - const: rockchip,rk3528
+
- description: FriendlyElec NanoPC T6 series boards
items:
- enum:
--
2.50.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v4 6/6] arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
` (4 preceding siblings ...)
2025-07-17 10:37 ` [PATCH v4 5/6] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2 Jonas Karlman
@ 2025-07-17 10:37 ` Jonas Karlman
2025-08-26 8:31 ` [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and " Jonas Karlman
2025-08-30 18:43 ` Heiko Stuebner
7 siblings, 0 replies; 10+ messages in thread
From: Jonas Karlman @ 2025-07-17 10:37 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yao Zi, Chukun Pan, Nicolas Frattaroli, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
The NanoPi Zero2 is a small single board computer developed by
FriendlyElec, based on the Rockchip RK3528A SoC.
Add initial device tree for the FriendlyElec NanoPi Zero2 board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
---
Changes in v4:
- No change
Changes in v3:
- Rename led nodes to led-0/led-1 (Chukun Pan)
Changes in v2:
- Drop clock-output-names prop from rtc node (Chukun Pan)
- Collect t-b tag
Schematics: https://wiki.friendlyelec.com/wiki/images/3/37/NanoPi_Zero2_2407_SCH.pdf
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 340 ++++++++++++++++++
2 files changed, 341 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 206fb8572cf7..0662fcf00628 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -90,6 +90,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2f.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
new file mode 100644
index 000000000000..9f683033c5f3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
@@ -0,0 +1,340 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3528.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi Zero2";
+ compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
+
+ aliases {
+ ethernet0 = &gmac1;
+ i2c1 = &i2c1;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ adc-keys-0 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "MASK";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ adc-keys-1 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-recovery {
+ label = "RECOVERY";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led1>, <&led_sys>;
+
+ led-0 {
+ color = <LED_COLOR_ID_RED>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "on";
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ vcc0v6_ddr: regulator-0v6-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc0v6_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <600000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_0v9: regulator-0v9-vdd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: regulator-1v1-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v8: regulator-1v8-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc_3v3: regulator-3v3-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_sd: regulator-3v3-vcc-sd {
+ compatible = "regulator-fixed";
+ gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwren_l>;
+ regulator-name = "vcc3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_sys: regulator-5v0-vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ usb2_host_5v: regulator-5v0-usb2-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb20_host1_pwren>;
+ regulator-name = "usb2_host_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vccio_sd: regulator-vccio-sd {
+ compatible = "regulator-gpio";
+ gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ states = <1800000 0x0>, <3300000 0x1>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_arm: regulator-vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <746000>;
+ regulator-max-microvolt = <1201000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ vdd_logic: regulator-vdd-logic {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <705000>;
+ regulator-max-microvolt = <1006000>;
+ regulator-settling-time-up-us = <250>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m0_xfer>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int_l>;
+ wakeup-source;
+ };
+};
+
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_rstn_l>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ ethernet {
+ gmac1_rstn_l: gmac1-rstn-l {
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ led1: led1 {
+ rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ led_sys: led-sys {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtc {
+ rtc_int_l: rtc-int-l {
+ rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sdmmc_pwren_l: sdmmc-pwren-l {
+ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb20_host1_pwren: usb20-host1-pwren {
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1m0_pins>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2m0_pins>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0m0_xfer>;
+ status = "okay";
+};
--
2.50.1
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
` (5 preceding siblings ...)
2025-07-17 10:37 ` [PATCH v4 6/6] arm64: dts: " Jonas Karlman
@ 2025-08-26 8:31 ` Jonas Karlman
2025-08-30 18:45 ` Heiko Stuebner
2025-08-30 18:43 ` Heiko Stuebner
7 siblings, 1 reply; 10+ messages in thread
From: Jonas Karlman @ 2025-08-26 8:31 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yao Zi,
Chukun Pan, Nicolas Frattaroli, linux-rockchip, devicetree,
linux-arm-kernel, linux-kernel
Hi Heiko,
On 7/17/2025 12:37 PM, Jonas Karlman wrote:
> This series adds dt-bindings and initial device tree for the following
> Rockchip RK3528A boards:
> - Radxa ROCK 2A/2F
> - ArmSoM Sige1
> - FriendlyElec NanoPi Zero2
>
> The bt/wifi_reg_on pins are described in the device tree using
> rfkill-gpio nodes.
>
> Changes in v4:
> - Remove disable-wp prop from sdio0
> - Collect r-b and t-b tags
>
> Changes in v3:
> - Rename led nodes to led-0/led-1
> - Remove pinctrl* props from sdio0
> - Collect a-b tags
>
> Changes in v2:
> - Limit sdmmc max-frequency to 100 MHz on ROCK 2A/2F
> - Drop clock-output-names prop from rtc node on Sige1 and NanoPi Zero2
> - Drop regulator-boot-on from usb 2.0 host regulators on Sige1
> - Add bluetooth and wifi nodes on Sige1
> - Collect t-b tag for NanoPi Zero2
>
> These boards can be booted from emmc or sd-card using the U-Boot 2025.07
> generic-rk3528 target or work-in-progress patches for these boards [1].
>
> For working bluetooth on ArmSoM Sige1 the patch "arm64: dts: rockchip:
> Fix UART DMA support for RK3528" [2] is required.
>
> [1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528
> [2] https://lore.kernel.org/r/20250709210831.3170458-1-jonas@kwiboo.se
>
> Jonas Karlman (6):
> dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
> arm64: dts: rockchip: Add Radxa ROCK 2A/2F
> dt-bindings: arm: rockchip: Add ArmSoM Sige1
> arm64: dts: rockchip: Add ArmSoM Sige1
> dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
> arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
>
> .../devicetree/bindings/arm/rockchip.yaml | 17 +
> arch/arm64/boot/dts/rockchip/Makefile | 4 +
> .../boot/dts/rockchip/rk3528-armsom-sige1.dts | 464 ++++++++++++++++++
> .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 340 +++++++++++++
> .../boot/dts/rockchip/rk3528-rock-2.dtsi | 293 +++++++++++
> .../boot/dts/rockchip/rk3528-rock-2a.dts | 82 ++++
> .../boot/dts/rockchip/rk3528-rock-2f.dts | 10 +
> 7 files changed, 1210 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
Any thoughts on this series? Rebased patches for a possible re-send v5
contained no changes compared to this v4.
I would like to send a v2 on the follow up "rockchip: Add USB 2.0
support for RK3528" [3] series and was unsure about the state of this
series before sending that.
[3] https://lore.kernel.org/r/20250723122323.2344916-1-jonas@kwiboo.se
Regards,
Jonas
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2
2025-08-26 8:31 ` [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and " Jonas Karlman
@ 2025-08-30 18:45 ` Heiko Stuebner
0 siblings, 0 replies; 10+ messages in thread
From: Heiko Stuebner @ 2025-08-30 18:45 UTC (permalink / raw)
To: Jonas Karlman
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Yao Zi,
Chukun Pan, Nicolas Frattaroli, linux-rockchip, devicetree,
linux-arm-kernel, linux-kernel
Hi Jonas,
Am Dienstag, 26. August 2025, 10:31:07 Mitteleuropäische Sommerzeit schrieb Jonas Karlman:
> Hi Heiko,
>
> On 7/17/2025 12:37 PM, Jonas Karlman wrote:
> > This series adds dt-bindings and initial device tree for the following
> > Rockchip RK3528A boards:
> > - Radxa ROCK 2A/2F
> > - ArmSoM Sige1
> > - FriendlyElec NanoPi Zero2
> >
> > The bt/wifi_reg_on pins are described in the device tree using
> > rfkill-gpio nodes.
> >
> > Changes in v4:
> > - Remove disable-wp prop from sdio0
> > - Collect r-b and t-b tags
> >
> > Changes in v3:
> > - Rename led nodes to led-0/led-1
> > - Remove pinctrl* props from sdio0
> > - Collect a-b tags
> >
> > Changes in v2:
> > - Limit sdmmc max-frequency to 100 MHz on ROCK 2A/2F
> > - Drop clock-output-names prop from rtc node on Sige1 and NanoPi Zero2
> > - Drop regulator-boot-on from usb 2.0 host regulators on Sige1
> > - Add bluetooth and wifi nodes on Sige1
> > - Collect t-b tag for NanoPi Zero2
> >
> > These boards can be booted from emmc or sd-card using the U-Boot 2025.07
> > generic-rk3528 target or work-in-progress patches for these boards [1].
> >
> > For working bluetooth on ArmSoM Sige1 the patch "arm64: dts: rockchip:
> > Fix UART DMA support for RK3528" [2] is required.
> >
> > [1] https://source.denx.de/u-boot/contributors/kwiboo/u-boot/-/commits/rk3528
> > [2] https://lore.kernel.org/r/20250709210831.3170458-1-jonas@kwiboo.se
> >
> > Jonas Karlman (6):
> > dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
> > arm64: dts: rockchip: Add Radxa ROCK 2A/2F
> > dt-bindings: arm: rockchip: Add ArmSoM Sige1
> > arm64: dts: rockchip: Add ArmSoM Sige1
> > dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
> > arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
> >
> > .../devicetree/bindings/arm/rockchip.yaml | 17 +
> > arch/arm64/boot/dts/rockchip/Makefile | 4 +
> > .../boot/dts/rockchip/rk3528-armsom-sige1.dts | 464 ++++++++++++++++++
> > .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 340 +++++++++++++
> > .../boot/dts/rockchip/rk3528-rock-2.dtsi | 293 +++++++++++
> > .../boot/dts/rockchip/rk3528-rock-2a.dts | 82 ++++
> > .../boot/dts/rockchip/rk3528-rock-2f.dts | 10 +
> > 7 files changed, 1210 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
> > create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> > create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
> > create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
> > create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
>
> Any thoughts on this series? Rebased patches for a possible re-send v5
> contained no changes compared to this v4.
>
> I would like to send a v2 on the follow up "rockchip: Add USB 2.0
> support for RK3528" [3] series and was unsure about the state of this
> series before sending that.
>
> [3] https://lore.kernel.org/r/20250723122323.2344916-1-jonas@kwiboo.se
it was pretty far down in my inbox, so I hadn't gotten to it yet,
picked up now and the patches indeed look good as they are.
Thanks for the ping though.
Heiko
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2
2025-07-17 10:37 [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and NanoPi Zero2 Jonas Karlman
` (6 preceding siblings ...)
2025-08-26 8:31 ` [PATCH v4 0/6] arm64: dts: rockchip: Add ROCK 2A/2F, Sige1 and " Jonas Karlman
@ 2025-08-30 18:43 ` Heiko Stuebner
7 siblings, 0 replies; 10+ messages in thread
From: Heiko Stuebner @ 2025-08-30 18:43 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jonas Karlman
Cc: Heiko Stuebner, Yao Zi, Chukun Pan, Nicolas Frattaroli,
linux-rockchip, devicetree, linux-arm-kernel, linux-kernel
On Thu, 17 Jul 2025 10:37:02 +0000, Jonas Karlman wrote:
> This series adds dt-bindings and initial device tree for the following
> Rockchip RK3528A boards:
> - Radxa ROCK 2A/2F
> - ArmSoM Sige1
> - FriendlyElec NanoPi Zero2
>
> The bt/wifi_reg_on pins are described in the device tree using
> rfkill-gpio nodes.
>
> [...]
Applied, thanks!
[1/6] dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F
commit: ba9d9ac745b110e937619d0379456f4906700d2f
[2/6] arm64: dts: rockchip: Add Radxa ROCK 2A/2F
commit: dc16a221c07b5336d4efb1cfc0bfd7089eea1fce
[3/6] dt-bindings: arm: rockchip: Add ArmSoM Sige1
commit: 5e1f607a05d848ee7e8fd161c966af5877a5721c
[4/6] arm64: dts: rockchip: Add ArmSoM Sige1
commit: 7cedc908a877d7c003aa0c205fb088bb6c15f5d4
[5/6] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2
commit: f4159921a4f51779680026fd923d59186916412b
[6/6] arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2
commit: cf9a5be7cb3f93d384531abcd5256b04e5650370
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 10+ messages in thread