* [PATCH v8 01/23] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 02/23] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
` (22 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise Yosemite 4 devicetree for devices behind i2c-mux
- Add gpio and eeprom behind i2c-mux
- Remove redundant idle-state setting for i2c-mux
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 381 ++++++++++++++++--
1 file changed, 347 insertions(+), 34 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 98477792aa00..66855efa0b4b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -17,6 +17,25 @@ aliases {
serial6 = &uart7;
serial7 = &uart8;
serial8 = &uart9;
+
+ i2c16 = &imux16;
+ i2c17 = &imux17;
+ i2c18 = &imux18;
+ i2c19 = &imux19;
+ i2c20 = &imux20;
+ i2c21 = &imux21;
+ i2c22 = &imux22;
+ i2c23 = &imux23;
+ i2c24 = &imux24;
+ i2c25 = &imux25;
+ i2c26 = &imux26;
+ i2c27 = &imux27;
+ i2c28 = &imux28;
+ i2c29 = &imux29;
+ i2c30 = &imux30;
+ i2c31 = &imux31;
+ i2c32 = &imux32;
+ i2c33 = &imux33;
};
chosen {
@@ -259,9 +278,109 @@ &i2c8 {
bus-frequency = <400000>;
i2c-mux@70 {
compatible = "nxp,pca9544";
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x70>;
+
+ imux16: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux17: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux18: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux19: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
};
};
@@ -270,15 +389,174 @@ &i2c9 {
bus-frequency = <400000>;
i2c-mux@71 {
compatible = "nxp,pca9544";
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x71>;
+
+ imux20: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux21: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux22: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux23: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
};
};
&i2c10 {
status = "okay";
bus-frequency = <400000>;
+ i2c-mux@74 {
+ compatible = "nxp,pca9544";
+ i2c-mux-idle-disconnect;
+ reg = <0x74>;
+
+ imux28: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "","","","",
+ "NIC0-MAIN-PWR-EN","NIC1-MAIN-PWR-EN",
+ "NIC2-MAIN-PWR-EN","NIC3-MAIN-PWR-EN",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+ };
+ };
+
+ imux29: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
};
&i2c11 {
@@ -440,16 +718,14 @@ eeprom@51 {
reg = <0x51>;
};
- i2c-mux@71 {
- compatible = "nxp,pca9846";
+ i2c-mux@74 {
+ compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
-
- idle-state = <0>;
i2c-mux-idle-disconnect;
- reg = <0x71>;
+ reg = <0x74>;
- i2c@0 {
+ imux30: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -457,26 +733,26 @@ i2c@0 {
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
pwm@20{
- compatible = "max31790";
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
reg = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- pwm@23{
- compatible = "max31790";
- reg = <0x23>;
- #address-cells = <1>;
- #size-cells = <0>;
+ pwm@2f{
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
+ reg = <0x2f>;
};
adc@33 {
@@ -499,34 +775,34 @@ gpio@61 {
};
};
- i2c@1 {
+ imux31: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <0>;
+ reg = <1>;
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
pwm@20{
- compatible = "max31790";
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
reg = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- pwm@23{
- compatible = "max31790";
- reg = <0x23>;
- #address-cells = <1>;
- #size-cells = <0>;
+ pwm@2f{
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
+ reg = <0x2f>;
};
adc@33 {
@@ -554,12 +830,10 @@ i2c-mux@73 {
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
-
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x73>;
- i2c@0 {
+ imux32: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -570,10 +844,10 @@ adc@35 {
};
};
- i2c@1 {
+ imux33: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <0>;
+ reg = <1>;
adc@35 {
compatible = "maxim,max11617";
@@ -596,9 +870,48 @@ mctp@10 {
i2c-mux@72 {
compatible = "nxp,pca9544";
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x72>;
+
+ imux24: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
+
+ imux25: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
+
+ imux26: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
+
+ imux27: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 02/23] ARM: dts: aspeed: yosemite4: Enable adc15
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 01/23] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 03/23] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
` (21 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Enable Yosemite 4 adc15 config
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 66855efa0b4b..dd88be47d1c8 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -51,7 +51,7 @@ iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
- <&adc1 0>, <&adc1 1>;
+ <&adc1 0>, <&adc1 1>, <&adc1 7>;
};
};
@@ -925,10 +925,10 @@ &pinctrl_adc4_default &pinctrl_adc5_default
&adc1 {
status = "okay";
- pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>;
+ pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>
+ &pinctrl_adc15_default>;
};
-
&ehci0 {
status = "okay";
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 03/23] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 01/23] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 02/23] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 04/23] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
` (20 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
enable spi-gpio setting for spi flash
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index dd88be47d1c8..effc2af636a4 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -53,6 +53,24 @@ iio-hwmon {
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
<&adc1 0>, <&adc1 1>, <&adc1 7>;
};
+
+ spi_gpio: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
+
+ tpmdev@0 {
+ compatible = "tcg,tpm_tis-spi";
+ spi-max-frequency = <33000000>;
+ reg = <0>;
+ };
+ };
};
&uart1 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 04/23] ARM: dts: aspeed: yosemite4: Enable watchdog2
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (2 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 03/23] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 05/23] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
` (19 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
enable watchdog2 setting
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index effc2af636a4..b0643e8aefee 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -120,6 +120,13 @@ &wdt1 {
aspeed,ext-pulse-duration = <256>;
};
+&wdt2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdtrst2_default>;
+ aspeed,reset-type = "system";
+};
+
&mac2 {
status = "okay";
pinctrl-names = "default";
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 05/23] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (3 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 04/23] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 06/23] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
` (18 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise quad mode to dual mode to avoid WP pin influnece the SPI
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index b0643e8aefee..a708e56b7ec3 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -149,15 +149,17 @@ flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
- spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
spi-max-frequency = <50000000>;
-#include "openbmc-flash-layout-64.dtsi"
+#include "openbmc-flash-layout-128.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "bmc2";
- spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
spi-max-frequency = <50000000>;
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 06/23] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (4 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 05/23] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 07/23] ARM: dts: aspeed: yosemite4: Add gpio pca9506 Delphine CC Chiu
` (17 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise power sensor adm1281 for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 24 ++++++++++++-------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index a708e56b7ec3..f0f714c7bc77 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -176,8 +176,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -193,8 +194,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -210,8 +212,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -227,8 +230,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -244,8 +248,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -261,8 +266,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -278,8 +284,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -295,8 +302,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 07/23] ARM: dts: aspeed: yosemite4: Add gpio pca9506
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (5 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 06/23] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 08/23] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible Delphine CC Chiu
` (16 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add gpio pca9506 I/O expander for yv4 use
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 252 ++++++++++++++++++
1 file changed, 252 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index f0f714c7bc77..33dcb2451ae3 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -175,6 +175,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -193,6 +221,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -211,6 +267,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -229,6 +313,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -247,6 +359,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -265,6 +405,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -283,6 +451,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -301,6 +497,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -690,6 +914,34 @@ ipmb@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&i2c14 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 08/23] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (6 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 07/23] ARM: dts: aspeed: yosemite4: Add gpio pca9506 Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 09/23] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555 Delphine CC Chiu
` (15 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Remove space for adm1272 compatible
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 33dcb2451ae3..ee11b3b8e81f 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -821,12 +821,12 @@ imux29: i2c@1 {
&i2c11 {
status = "okay";
power-sensor@10 {
- compatible = "adi, adm1272";
+ compatible = "adi,adm1272";
reg = <0x10>;
};
power-sensor@12 {
- compatible = "adi, adm1272";
+ compatible = "adi,adm1272";
reg = <0x12>;
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 09/23] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (7 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 08/23] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 10/23] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading Delphine CC Chiu
` (14 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Enable interrupt setting for pca9555
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 56 +++++++++++++++++--
1 file changed, 52 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index ee11b3b8e81f..92733a8ecf0b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -832,30 +832,78 @@ power-sensor@12 {
gpio@20 {
compatible = "nxp,pca9555";
- reg = <0x20>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "P48V-OCP-GPIO1","P48V-OCP-GPIO2",
+ "P48V-OCP-GPIO3","FAN-BOARD-0-REVISION-0-R",
+ "FAN-BOARD-0-REVISION-1-R","FAN-BOARD-1-REVISION-0-R",
+ "FAN-BOARD-1-REVISION-1-R","RST-MUX-R-N",
+ "RST-LED-CONTROL-FAN-BOARD-0-N","RST-LED-CONTROL-FAN-BOARD-1-N",
+ "RST-IOEXP-FAN-BOARD-0-N","RST-IOEXP-FAN-BOARD-1-N",
+ "PWRGD-LOAD-SWITCH-FAN-BOARD-0-R","PWRGD-LOAD-SWITCH-FAN-BOARD-1-R",
+ "","";
};
gpio@21 {
compatible = "nxp,pca9555";
- reg = <0x21>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x21>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC-OCP-SLOT-ODD-GPIO1","HSC-OCP-SLOT-ODD-GPIO2",
+ "HSC-OCP-SLOT-ODD-GPIO3","HSC-OCP-SLOT-EVEN-GPIO1",
+ "HSC-OCP-SLOT-EVEN-GPIO2","HSC-OCP-SLOT-EVEN-GPIO3",
+ "ADC-TYPE-0-R","ADC-TYPE-1-R",
+ "MEDUSA-BOARD-REV-0","MEDUSA-BOARD-REV-1",
+ "MEDUSA-BOARD-REV-2","MEDUSA-BOARD-TYPE",
+ "DELTA-MODULE-TYPE","P12V-HSC-TYPE",
+ "","";
};
gpio@22 {
compatible = "nxp,pca9555";
- reg = <0x22>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "CARD-TYPE-SLOT1","CARD-TYPE-SLOT2",
+ "CARD-TYPE-SLOT3","CARD-TYPE-SLOT4",
+ "CARD-TYPE-SLOT5","CARD-TYPE-SLOT6",
+ "CARD-TYPE-SLOT7","CARD-TYPE-SLOT8",
+ "OC-P48V-HSC-0-N","FLT-P48V-HSC-0-N",
+ "OC-P48V-HSC-1-N","FLT-P48V-HSC-1-N",
+ "EN-P48V-AUX-0","EN-P48V-AUX-1",
+ "PWRGD-P12V-AUX-0","PWRGD-P12V-AUX-1";
};
gpio@23 {
compatible = "nxp,pca9555";
- reg = <0x23>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x23>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC1-ALERT1-R-N","HSC2-ALERT1-R-N",
+ "HSC3-ALERT1-R-N","HSC4-ALERT1-R-N",
+ "HSC5-ALERT1-R-N","HSC6-ALERT1-R-N",
+ "HSC7-ALERT1-R-N","HSC8-ALERT1-R-N",
+ "HSC1-ALERT2-R-N","HSC2-ALERT2-R-N",
+ "HSC3-ALERT2-R-N","HSC4-ALERT2-R-N",
+ "HSC5-ALERT2-R-N","HSC6-ALERT2-R-N",
+ "HSC7-ALERT2-R-N","HSC8-ALERT2-R-N";
};
temperature-sensor@48 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 10/23] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (8 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 09/23] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555 Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 11/23] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use Delphine CC Chiu
` (13 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add power sensor for power module reading
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 92733a8ecf0b..2ac872878acd 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -906,6 +906,11 @@ gpio@23 {
"HSC7-ALERT2-R-N","HSC8-ALERT2-R-N";
};
+ power-sensor@40 {
+ compatible = "mps,mp5023";
+ reg = <0x40>;
+ };
+
temperature-sensor@48 {
compatible = "ti,tmp75";
reg = <0x48>;
@@ -930,6 +935,26 @@ eeprom@54 {
compatible = "atmel,24c256";
reg = <0x54>;
};
+
+ power-sensor@62 {
+ compatible = "pmbus";
+ reg = <0x62>;
+ };
+
+ power-sensor@64 {
+ compatible = "pmbus";
+ reg = <0x64>;
+ };
+
+ power-sensor@65 {
+ compatible = "pmbus";
+ reg = <0x65>;
+ };
+
+ power-sensor@68 {
+ compatible = "pmbus";
+ reg = <0x68>;
+ };
};
&i2c12 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 11/23] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (9 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 10/23] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:17 ` [PATCH v8 12/23] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change Delphine CC Chiu
` (12 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add eeprom for yosemite4 use
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 2ac872878acd..9a14f0220cf6 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -932,7 +932,7 @@ temperature-sensor@4b {
};
eeprom@54 {
- compatible = "atmel,24c256";
+ compatible = "atmel,24c128";
reg = <0x54>;
};
@@ -971,6 +971,11 @@ eeprom@50 {
reg = <0x50>;
};
+ eeprom@54 {
+ compatible = "atmel,24c64";
+ reg = <0x54>;
+ };
+
rtc@6f {
compatible = "nuvoton,nct3018y";
reg = <0x6f>;
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 12/23] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (10 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 11/23] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use Delphine CC Chiu
@ 2024-05-23 9:17 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 13/23] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode " Delphine CC Chiu
` (11 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:17 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Remove temperature sensor for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 9a14f0220cf6..8f3bbdd1bbc5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -921,16 +921,6 @@ temperature-sensor@49 {
reg = <0x49>;
};
- temperature-sensor@4a {
- compatible = "ti,tmp75";
- reg = <0x4a>;
- };
-
- temperature-sensor@4b {
- compatible = "ti,tmp75";
- reg = <0x4b>;
- };
-
eeprom@54 {
compatible = "atmel,24c128";
reg = <0x54>;
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 13/23] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode for yosemite4 schematic change
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (11 preceding siblings ...)
2024-05-23 9:17 ` [PATCH v8 12/23] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 14/23] ARM: dts: aspeed: yosemite4: Revise ina233 config " Delphine CC Chiu
` (10 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise adc128d818 adc mode for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 8f3bbdd1bbc5..0c7d85ff4360 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1018,19 +1018,19 @@ &i2c14 {
adc@1d {
compatible = "ti,adc128d818";
reg = <0x1d>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
- adc@35 {
+ adc@36 {
compatible = "ti,adc128d818";
- reg = <0x35>;
- ti,mode = /bits/ 8 <2>;
+ reg = <0x36>;
+ ti,mode = /bits/ 8 <1>;
};
adc@37 {
compatible = "ti,adc128d818";
reg = <0x37>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
power-sensor@40 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 14/23] ARM: dts: aspeed: yosemite4: Revise ina233 config for yosemite4 schematic change
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (12 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 13/23] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode " Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 15/23] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection Delphine CC Chiu
` (9 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise ina233 config for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 20 ++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 0c7d85ff4360..67e3c787d675 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1034,28 +1034,38 @@ adc@37 {
};
power-sensor@40 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x40>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@41 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x41>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@42 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x42>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@43 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x43>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@44 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x44>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
temperature-sensor@4e {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 15/23] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (13 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 14/23] ARM: dts: aspeed: yosemite4: Revise ina233 config " Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 16/23] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
` (8 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Remove idle state setting for yosemite4 NIC connection
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 67e3c787d675..8b23b012d6f5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1235,7 +1235,6 @@ mctp@10 {
i2c-mux@72 {
compatible = "nxp,pca9544";
- i2c-mux-idle-disconnect;
reg = <0x72>;
imux24: i2c@0 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 16/23] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (14 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 15/23] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 17/23] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
` (7 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Initialize bmc gpio state
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 234 ++++++++++++++++++
1 file changed, 234 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 8b23b012d6f5..3baf1df11a81 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1304,3 +1304,237 @@ &ehci1 {
&uhci {
status = "okay";
};
+
+&sgpiom0 {
+ status = "okay";
+ ngpios = <128>;
+ bus-frequency = <48000>;
+};
+
+&pinctrl {
+ pinctrl_gpio0_unbiased: gpio0_unbiased {
+ /* GPIOB0, GPIOB1 */
+ pins = "J26", "K23";
+ bias-disable;
+ };
+ pinctrl_gpio2_unbiased: gpio2_unbiased {
+ /* GPIOI5, GPIOI6, GPIOI7,
+ GPIOL6 */
+ pins = "E16", "B16", "A15", "B14";
+ bias-disable;
+ };
+ pinctrl_gpio3_unbiased: gpio3_unbiased {
+ /* GPIOM2, GPIOM3, GPIOM4, GPIOM5,
+ GPION0, GPION1, GPION2, GPION3, GPION5,
+ GPIOO0, GPIOO1, GPIOO2, GPIOO3,
+ GPIOP0, GPIOP1, GPIOP2, GPIOP3, GPIOP4, GPIOP5, GPIOP6 */
+ pins = "A12", "E14", "B12", "C12", "P25", "N23", "N25", "N24", "M23", "AD26", "AD22", "AD23", "AD24", "AB22", "W24", "AA23", "AA24", "W23", "AB23", "AB24";
+ bias-disable;
+ };
+ pinctrl_gpio4_unbiased: gpio4_unbiased {
+ /* GPIOR0, GPIOR1, GPIOR2, GPIOR3, GPIOR4, GPIOR5, GPIOR6, GPIOR7
+ GPIOS0, GPIOS1, GPIOS2, GPIOS3, GPIOS5, GPIOS6, GPIOS7 */
+ pins = "V25", "U24", "V24", "V26", "U25", "T23", "W26", "U26", "R23", "T25", "T26", "R24", "P24", "P23", "T24";
+ bias-disable;
+ };
+ pinctrl_gpio5_unbiased: gpio5_unbiased {
+ /* GPIOV0, GPIOV1, GPIOV2, GPIOV3, GPIOV4, GPIOV5, GPIOV6, GPIOV7
+ GPIOX1, GPIOX2 */
+ pins = "AB15", "AF14", "AD14", "AC15", "AE15", "AE14", "AD15", "AF15", "AA9", "AC9";
+ bias-disable;
+ };
+ pinctrl_gpio6_unbiased: gpio6_unbiased {
+ /* GPIOY2, GPIOY5, GPIOY6
+ GPIOZ0, GPIOZ1, GPIOZ3, GPIOZ4 */
+ pins = "AE11", "AF12", "AC12", "AC10", "AD10", "AB11", "AC11";
+ bias-disable;
+ };
+};
+
+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiu2_default &pinctrl_gpiu3_default
+ &pinctrl_gpiu4_default &pinctrl_gpiu6_default
+ &pinctrl_gpio0_unbiased &pinctrl_gpio2_unbiased
+ &pinctrl_gpio3_unbiased &pinctrl_gpio4_unbiased
+ &pinctrl_gpio5_unbiased &pinctrl_gpio6_unbiased>;
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "FLT-HSC-SERVER-SLOT8-N","AC-ON-OFF-BTN-CPLD-SLOT5-N",
+ "PWRGD-SLOT1-STBY","PWRGD-SLOT2-STBY",
+ "PWRGD-SLOT3-STBY","PWRGD-SLOT4-STBY","","",
+ /*C0-C7*/ "","","","","FM-NIC0-WAKE-N",
+ "FM-NIC1-WAKE-N","","RST-PCIE-SLOT2-N",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "PRSNT-NIC1-N","PRSNT-NIC2-N","","RST-PCIE-SLOT1-N",
+ "","","","",
+ /*F0-F7*/ "FM-RESBTN-SLOT1-BMC-N","FM-RESBTN-SLOT2-BMC-N",
+ "FM-RESBTN-SLOT3-BMC-N","FM-RESBTN-SLOT4-BMC-N",
+ "PRSNT-SB-SLOT1-N","PRSNT-SB-SLOT2-N",
+ "PRSNT-SB-SLOT3-N","PRSNT-SB-SLOT4-N",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","ALT-MEDUSA-ADC-N",
+ "ALT-SMB-BMC-CPLD2-N",
+ "INT-SPIDER-ADC-R-N",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","ALT-MEDUSA-P12V-EFUSE-N","",
+ /*M0-M7*/ "EN-NIC0-POWER-BMC-R","EN-NIC1-POWER-BMC-R",
+ "INT-MEDUSA-IOEXP-TEMP-N","PRSNT-NIC3-N",
+ "INT-SMB-BMC-SLOT1-4-BMC-N",
+ "AC-ON-OFF-BTN-CPLD-SLOT6-N","","",
+ /*N0-N7*/ "FLT-HSC-SERVER-SLOT1-N","FLT-HSC-SERVER-SLOT2-N",
+ "FLT-HSC-SERVER-SLOT3-N","FLT-HSC-SERVER-SLOT4-N",
+ "FM-BMC-READY-R2","RST-SMB-NIC0-R-N","","",
+ /*O0-O7*/ "AC-ON-OFF-BTN-CPLD-SLOT8-N","RST-SMB-NIC1-R-N",
+ "RST-SMB-NIC2-R-N","RST-SMB-NIC3-R-N",
+ "","","","",
+ /*P0-P7*/ "ALT-SMB-BMC-CPLD1-N","'BTN-BMC-R2-N",
+ "EN-P3V-BAT-SCALED-R","PWRGD-P5V-USB-BMC",
+ "FM-BMC-RTCRST-R","RST-USB-HUB-R-N",
+ "FLAG-P5V-USB-BMC-N","",
+ /*Q0-Q7*/ "AC-ON-OFF-BTN-CPLD-SLOT1-N","AC-ON-OFF-BTN-CPLD-SLOT2-N",
+ "AC-ON-OFF-BTN-CPLD-SLOT3-N","AC-ON-OFF-BTN-CPLD-SLOT4-N",
+ "PRSNT-SB-SLOT5-N","PRSNT-SB-SLOT6-N",
+ "PRSNT-SB-SLOT7-N","PRSNT-SB-SLOT8-N",
+ /*R0-R7*/ "AC-ON-OFF-BTN-CPLD-SLOT7-N","INT-SMB-BMC-SLOT5-8-BMC-N",
+ "FM-PWRBRK-NIC-BMC-R2","RST-PCIE-SLOT4-N",
+ "RST-PCIE-SLOT5-N","RST-PCIE-SLOT6-N",
+ "RST-PCIE-SLOT7-N","RST-PCIE-SLOT8-N",
+ /*S0-S7*/ "FM-NIC2-WAKE-N","FM-NIC3-WAKE-N",
+ "EN-NIC3-POWER-BMC-R","SEL-BMC-JTAG-MUX-R",
+ "","ALT-P12V-AUX-N","FAST-PROCHOT-N",
+ "SPI-WP-DISABLE-STATUS-R-N",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","RST-PCIE-SLOT3-N","",
+ "","PRSNT-NIC0-N","","",
+ /*V0-V7*/ "FM-RESBTN-SLOT5-BMC-N","FM-RESBTN-SLOT6-BMC-N",
+ "FM-RESBTN-SLOT7-BMC-N","FM-RESBTN-SLOT8-BMC-N",
+ "","","","",
+ /*W0-W7*/ "PRSNT-TPM-BMC-N","PRSNT-OCP-DEBUG-BMC-N","ALT-TEMP-BMC-N","ALT-RTC-BMC-N",
+ "","","","",
+ /*X0-X7*/ "","LT-HSC-SERVER-SLOT6-N","FLT-HSC-SERVER-SLOT7-N","","","",
+ "PWRGD-SLOT5-STBY","PWRGD-SLOT6-STBY",
+ /*Y0-Y7*/ "","","SPI-LOCK-REQ-BMC-N","PWRGD-SLOT7-STBY",
+ "","","EN-NIC2-POWER-BMC-R","",
+ /*Z0-Z7*/ "EN-P5V-USB-CPLD-R","'FLT-HSC-SERVER-SLOT5-N",
+ "PWRGD-SLOT8-STBY","","","","","";
+
+ pin_gpio_b4 {
+ gpios = <ASPEED_GPIO(B, 4) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_b5 {
+ gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_f0 {
+ gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f1 {
+ gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f2 {
+ gpios = <ASPEED_GPIO(F, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f3 {
+ gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f4 {
+ gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f5 {
+ gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f6 {
+ gpios = <ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f7 {
+ gpios = <ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_l6 {
+ gpios = <ASPEED_GPIO(L, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_l7 {
+ gpios = <ASPEED_GPIO(L, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_s0 {
+ gpios = <ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_s1 {
+ gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v0 {
+ gpios = <ASPEED_GPIO(V, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v1 {
+ gpios = <ASPEED_GPIO(V, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v2 {
+ gpios = <ASPEED_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v3 {
+ gpios = <ASPEED_GPIO(V, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w0 {
+ gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w1 {
+ gpios = <ASPEED_GPIO(W, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w2 {
+ gpios = <ASPEED_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w3 {
+ gpios = <ASPEED_GPIO(W, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w4 {
+ gpios = <ASPEED_GPIO(W, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w5 {
+ gpios = <ASPEED_GPIO(W, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w6 {
+ gpios = <ASPEED_GPIO(W, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w7 {
+ gpios = <ASPEED_GPIO(W, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z3 {
+ gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z4 {
+ gpios = <ASPEED_GPIO(Z, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z5 {
+ gpios = <ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 17/23] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (15 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 16/23] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 18/23] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
` (6 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise fan tach config for max31790 driver change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 48 +++++++++++++++++--
1 file changed, 44 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 3baf1df11a81..59615a6958ec 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1103,8 +1103,18 @@ adc@1f {
pwm@20{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x20>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
gpio@22{
@@ -1116,8 +1126,18 @@ gpio@22{
pwm@2f{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x2f>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
adc@33 {
@@ -1153,8 +1173,18 @@ adc@1f {
pwm@20{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x20>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
gpio@22{
@@ -1166,8 +1196,18 @@ gpio@22{
pwm@2f{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x2f>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
adc@33 {
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 18/23] ARM: dts: aspeed: yosemite4: add mctp config for NIC
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (16 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 17/23] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 19/23] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
` (5 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
add mctp config for NIC
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 59615a6958ec..83c9d76f5a11 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1281,40 +1281,64 @@ imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 19/23] ARM: dts: aspeed: yosemite4: support mux to cpld
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (17 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 18/23] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 20/23] ARM: dts: aspeed: yosemite4: support medusa board adc sensors Delphine CC Chiu
` (4 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Mux pca9544 to cpld was added on EVT HW schematic design,
so add dts setting for devices behind mux pca9544 to cpld
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 64 ++++++++++++++-----
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 83c9d76f5a11..f4e37187bd5b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -36,6 +36,10 @@ aliases {
i2c31 = &imux31;
i2c32 = &imux32;
i2c33 = &imux33;
+ i2c34 = &imux34;
+ i2c35 = &imux35;
+ i2c36 = &imux36;
+ i2c37 = &imux37;
};
chosen {
@@ -951,24 +955,54 @@ &i2c12 {
status = "okay";
bus-frequency = <400000>;
- temperature-sensor@48 {
- compatible = "ti,tmp75";
- reg = <0x48>;
- };
+ i2c-mux@70 {
+ compatible = "nxp,pca9544";
+ i2c-mux-idle-disconnect;
+ reg = <0x70>;
- eeprom@50 {
- compatible = "atmel,24c128";
- reg = <0x50>;
- };
+ imux34: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
- eeprom@54 {
- compatible = "atmel,24c64";
- reg = <0x54>;
- };
+ temperature-sensor@48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
- rtc@6f {
- compatible = "nuvoton,nct3018y";
- reg = <0x6f>;
+ eeprom@54 {
+ compatible = "atmel,24c64";
+ reg = <0x54>;
+ };
+
+ rtc@6f {
+ compatible = "nuvoton,nct3018y";
+ reg = <0x6f>;
+ };
+ };
+
+ imux35: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux36: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux37: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 20/23] ARM: dts: aspeed: yosemite4: support medusa board adc sensors
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (18 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 19/23] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 21/23] ARM: dts: aspeed: yosemite4: support NIC eeprom Delphine CC Chiu
` (3 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add ina233/ina28 support for medusa board adc sensors
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index f4e37187bd5b..bacaa2208734 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -915,6 +915,19 @@ power-sensor@40 {
reg = <0x40>;
};
+ power-sensor@41 {
+ compatible = "ti,ina233";
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
+ reg = <0x41>;
+ };
+
+ power-sensor@44 {
+ compatible = "ti,ina238";
+ shunt-resistor = <1000>;
+ reg = <0x44>;
+ };
+
temperature-sensor@48 {
compatible = "ti,tmp75";
reg = <0x48>;
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 21/23] ARM: dts: aspeed: yosemite4: support NIC eeprom
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (19 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 20/23] ARM: dts: aspeed: yosemite4: support medusa board adc sensors Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 22/23] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Delphine CC Chiu
` (2 subsequent siblings)
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add NIC eeprom devicetree config
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index bacaa2208734..62dfe935cbcd 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1338,6 +1338,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
imux25: i2c@1 {
@@ -1354,6 +1359,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
imux26: i2c@2 {
@@ -1370,6 +1380,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
imux27: i2c@3 {
@@ -1386,6 +1401,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 22/23] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (20 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 21/23] ARM: dts: aspeed: yosemite4: support NIC eeprom Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-23 9:18 ` [PATCH v8 23/23] ARM: dts: aspeed: yosemite4: add fan led config Delphine CC Chiu
2024-05-24 0:01 ` [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Andrew Jeffery
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise duty cycle SMB11 and SMB16 to high: 40%, low: 60%,
to meet 400kHz-i2c clock low time spec (> 1.3 us) from EE request
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 62dfe935cbcd..21ca22281ef8 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -761,6 +761,7 @@ eeprom@54 {
&i2c10 {
status = "okay";
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
i2c-mux@74 {
compatible = "nxp,pca9544";
i2c-mux-idle-disconnect;
@@ -1314,6 +1315,7 @@ &i2c15 {
mctp-controller;
multi-master;
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
mctp@10 {
compatible = "mctp-i2c-controller";
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH v8 23/23] ARM: dts: aspeed: yosemite4: add fan led config
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (21 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 22/23] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Delphine CC Chiu
@ 2024-05-23 9:18 ` Delphine CC Chiu
2024-05-24 0:01 ` [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Andrew Jeffery
23 siblings, 0 replies; 26+ messages in thread
From: Delphine CC Chiu @ 2024-05-23 9:18 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Set fan led config in yosemite4 DTS.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 152 +++++++++++++++++-
1 file changed, 150 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 21ca22281ef8..2cbb210ed53e 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -75,6 +75,154 @@ tpmdev@0 {
reg = <0>;
};
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ fan0_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan0_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan1_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan1_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan2_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan2_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan3_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan3_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan4_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan4_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan5_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan5_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan6_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan6_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan7_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan7_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan8_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan8_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan9_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan9_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan10_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan10_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan11_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan11_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&uart1 {
@@ -1198,7 +1346,7 @@ eeprom@52 {
reg = <0x52>;
};
- gpio@61 {
+ led_gpio0: gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
@@ -1268,7 +1416,7 @@ eeprom@52 {
reg = <0x52>;
};
- gpio@61 {
+ led_gpio1: gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
--
2.25.1
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4
2024-05-23 9:17 [PATCH v8 00/23] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (22 preceding siblings ...)
2024-05-23 9:18 ` [PATCH v8 23/23] ARM: dts: aspeed: yosemite4: add fan led config Delphine CC Chiu
@ 2024-05-24 0:01 ` Andrew Jeffery
23 siblings, 0 replies; 26+ messages in thread
From: Andrew Jeffery @ 2024-05-24 0:01 UTC (permalink / raw)
To: Delphine CC Chiu, patrick
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
devicetree, linux-arm-kernel, linux-aspeed, linux-kernel
There's still no response to my comments (either replies or adjustments
to the patches) on v5, and we're now at v8.
Upstreaming the patches won't progress if you don't engage with the
feedback.
Andrew
On Thu, 2024-05-23 at 17:17 +0800, Delphine CC Chiu wrote:
> Changelog:
> - v8
> - add fan led config
> - v7
> - Revise pca9506 i2c address
> - v6
> - Revise i2c duty-cycle for meeting 400khz spec
> - v5
> - Support medusa board adc sensors
> - support NIC eeprom
> - v4
> - Re-format gpio linename
> - Revise i2c device node names
> - Split patches by logic changes
> - v3
> - Correct patch for revising gpio name
> - v2
> - Revise mx31790 fan tach config
> - Add mctp config for NIC
> - Support mux to cpld
> - Revise gpio name
> - v1
> - Add gpio and eeprom behind i2c-mux
> - Remove redundant idle-state setting for i2c-mux
> - Enable adc 15, wdt2,spi gpio for yosemite4 use
> - Revise quad mode to dual mode to avoid WP pin influnece the SPI
> - Revise power sensor adm1281 for yosemite4 schematic change
> - Add gpio pca9506 I/O expander for yosemite4 use
> - remove space for adm1272 compatible
> - enable interrupt setting for pca9555
> - add eeprom for yosemite4 medusa board/BSM use
> - remove temperature sensor for yosemite4 schematic change
> - add power sensor for power module reading
> - Revise adc128d818 adc mode for yosemite4 schematic change
> - Revise ina233 for yosemite4 schematic change
> - Remove idle state setting for yosemite4 NIC connection
> - Initialize bmc gpio state
> - Revise mx31790 fan tach config
> - Add mctp config for NIC
> - Support mux to cpld
> - Revise gpio name
>
> Delphine CC Chiu (23):
> ARM: dts: aspeed: yosemite4: Revise i2c-mux devices
> ARM: dts: aspeed: yosemite4: Enable adc15
> ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
> ARM: dts: aspeed: yosemite4: Enable watchdog2
> ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode
> ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic
> change
> ARM: dts: aspeed: yosemite4: Add gpio pca9506
> ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible
> ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555
> ARM: dts: aspeed: yosemite4: Add power sensor for power module reading
> ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use
> ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4
> schematic change
> ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode for yosemite4
> schematic change
> ARM: dts: aspeed: yosemite4: Revise ina233 config for yosemite4
> schematic change
> ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4
> NIC connection
> ARM: dts: aspeed: yosemite4: Initialize bmc gpio state
> ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config
> ARM: dts: aspeed: yosemite4: add mctp config for NIC
> ARM: dts: aspeed: yosemite4: support mux to cpld
> ARM: dts: aspeed: yosemite4: support medusa board adc sensors
> ARM: dts: aspeed: yosemite4: support NIC eeprom
> ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle
> ARM: dts: aspeed: yosemite4: add fan led config
>
> .../aspeed/aspeed-bmc-facebook-yosemite4.dts | 1410 +++++++++++++++--
> 1 file changed, 1301 insertions(+), 109 deletions(-)
>
^ permalink raw reply [flat|nested] 26+ messages in thread