[PATCH v2] arm64: dts: st: add thermal zones on stm32mp251

[PATCH v2] arm64: dts: st: add thermal zones on stm32mp251

[Mateusz Nowicki]

Add a CPU and a SoC thermal zone for the two DTS sensors. The sensors
have no interrupt, so both zones are polled.

Each zone has a critical trip point at 122 C (Tj max 125 C minus
3 C sensor tolerance).

Signed-off-by: Mateusz Nowicki <mateusz.nowicki@posteo.net>
---
Changes in v2:
- Set critical trip to 122 C with 1 C hysteresis (Tj max minus sensor
  tolerance), as suggested by Patrick
- Add polling-delay-passive, the sensors have no interrupt

Link to v1: https://lore.kernel.org/r/20261004121200.64034-1-mateusz.nowicki@posteo.net/

 arch/arm64/boot/dts/st/stm32mp251.dtsi | 30 ++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index b624f998b87c..da75e02f7c8f 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -158,6 +158,36 @@ RET_PD: power-domain-retention {
 		};
 	};
 
+	thermal-zones {
+		cpu-thermal {
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+			thermal-sensors = <&dts 1>;
+
+			trips {
+				cpu-crit {
+					temperature = <122000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		soc-thermal {
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+			thermal-sensors = <&dts 0>;
+
+			trips {
+				soc-crit {
+					temperature = <122000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&intc>;

base-commit: f831584128ac2a36fb4fa62fe106793d08c2dbf1
-- 
2.56.0

Re: [PATCH v2] arm64: dts: st: add thermal zones on stm32mp251

[Patrick DELAUNAY]

Hi,

On 10/9/26 11:37, Mateusz Nowicki wrote:
> Add a CPU and a SoC thermal zone for the two DTS sensors. The sensors
> have no interrupt, so both zones are polled.
>
> Each zone has a critical trip point at 122 C (Tj max 125 C minus
> 3 C sensor tolerance).
>
> Signed-off-by: Mateusz Nowicki <mateusz.nowicki@posteo.net>
> ---
> Changes in v2:
> - Set critical trip to 122 C with 1 C hysteresis (Tj max minus sensor
>    tolerance), as suggested by Patrick
> - Add polling-delay-passive, the sensors have no interrupt
>
> Link to v1: https://lore.kernel.org/r/20261004121200.64034-1-mateusz.nowicki@posteo.net/
>
>   arch/arm64/boot/dts/st/stm32mp251.dtsi | 30 ++++++++++++++++++++++++++
>   1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> index b624f998b87c..da75e02f7c8f 100644
> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> @@ -158,6 +158,36 @@ RET_PD: power-domain-retention {
>   		};
>   	};
>   
> +	thermal-zones {
> +		cpu-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&dts 1>;
> +
> +			trips {
> +				cpu-crit {
> +					temperature = <122000>;
> +					hysteresis = <1000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		soc-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&dts 0>;
> +
> +			trips {
> +				soc-crit {
> +					temperature = <122000>;
> +					hysteresis = <1000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +	};
> +
>   	timer {
>   		compatible = "arm,armv8-timer";
>   		interrupt-parent = <&intc>;
>
> base-commit: f831584128ac2a36fb4fa62fe106793d08c2dbf1


Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

Thanks
Patrick