From: <Nicolas.Ferre@microchip.com>
To: <kuba@kernel.org>, <roman.gushchin@linux.dev>,
<Claudiu.Beznea@microchip.com>
Cc: <lars@metafoo.de>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <rafalo@cadence.com>,
<Conor.Dooley@microchip.com>, <davem@davemloft.net>,
<harini.katakam@xilinx.com>
Subject: Re: [PATCH net] net: macb: fix a memory corruption in extended buffer descriptor mode
Date: Wed, 12 Apr 2023 15:47:30 +0000 [thread overview]
Message-ID: <70253758-c167-02dc-9266-96edef8597f2@microchip.com> (raw)
In-Reply-To: <20230411211343.43b6833a@kernel.org>
Jakub, Roman,
On 12/04/2023 at 06:13, Jakub Kicinski wrote:
> On Tue, 11 Apr 2023 20:48:50 -0700 Roman Gushchin wrote:
>>> diff --git a/drivers/net/ethernet/cadence/macb_main.c
>>> b/drivers/net/ethernet/cadence/macb_main.c
>>> index d13fb1d31821..1a40d5a26f36 100644
>>> --- a/drivers/net/ethernet/cadence/macb_main.c
>>> +++ b/drivers/net/ethernet/cadence/macb_main.c
>>> @@ -1042,6 +1042,10 @@ static dma_addr_t macb_get_addr(struct macb *bp,
>>> struct macb_dma_desc *desc)
>>> }
>>> #endif
>>> addr |= MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr));
>>> +#ifdef CONFIG_MACB_USE_HWSTAMP
>>> + if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
>>> + addr &= ~GEM_BIT(DMA_RXVALID_OFFSET);
>>> +#endif
>>> return addr;
>>> }
>>
>> I think this version is slightly worse because it adds an unconditional
>> if statement, which can be removed with certain config options.
>> I can master a version with a helper function, if it's preferable.
>>
>> But if you like this one, it's fine too, let me know, I'll send an updated
>> version.
>
> Yup, IMHO this looks better. More likely that someone reading the code
> will spot the trickiness.
Ok with this version, even if adding to the hot path is really a big
concern for our low-end CPUs (ARM9 and Cortex-A5).
> I suspect we could clear that bit unconditionally, if the branch is
> a concern. The code seems to assume that buffers it gets are 8B aligned
> already, regardless of CONFIG_MACB_USE_HWSTAMP.
>
> Drivers commonly save the DMA address to a SW ring (here I think
> rx_skbuff plays this role but only holds single ptr per entry)
> so that they don't have to access potentially uncached descriptor
> ring. But that'd be too large of a change for a fix.
Ok with that statement:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Thanks, best regards,
Nicolas
--
Nicolas Ferre
prev parent reply other threads:[~2023-04-12 15:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-07 17:24 Roman Gushchin
2023-04-11 18:20 ` Roman Gushchin
2023-04-11 18:30 ` Conor Dooley
2023-04-11 21:20 ` Roman Gushchin
2023-04-12 1:48 ` Jakub Kicinski
2023-04-12 3:13 ` Lars-Peter Clausen
2023-04-12 3:48 ` Roman Gushchin
2023-04-12 4:13 ` Jakub Kicinski
2023-04-12 15:47 ` Nicolas.Ferre [this message]
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