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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Udit Kumar <u-kumar1@ti.com>, <nm@ti.com>
Cc: <kristo@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Dasnavis Sabiya <sabiya.d@ti.com>
Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs
Date: Fri, 21 Jun 2024 20:51:02 +0530	[thread overview]
Message-ID: <71126a8f-7a6d-4561-bb13-a403fe580ab2@ti.com> (raw)
In-Reply-To: <20240603112938.2188510-1-u-kumar1@ti.com>



On 03/06/24 16:59, Udit Kumar wrote:
> From: Dasnavis Sabiya <sabiya.d@ti.com>
> 
> Add dts nodes for 6 EHRPWM instances on SoC.
> 
> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
> Signed-off-by: Udit Kumar <u-kumar1@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 66 ++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 6a4554c6c9c1..f6fc2ce55f9b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -75,6 +75,72 @@ serdes_ln_ctrl: mux-controller@4080 {
>  				      <J784S4_SERDES4_LANE2_EDP_LANE2>,
>  				      <J784S4_SERDES4_LANE3_EDP_LANE3>;
>  		};
> +
> +		ehrpwm_tbclk: clock-controller@4140 {
> +			compatible = "ti,am654-ehrpwm-tbclk";
> +			reg = <0x4140 0x18>;
> +			#clock-cells = <1>;
> +		};
> +	};
> +
> +	main_ehrpwm0: pwm@3000000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;


This needs to be ordered as per

https://www.kernel.org/doc/Documentation/devicetree/bindings/dts-coding-style.rst
(compatible is immediately followed by reg)

Will fix all the nodes locally before merging

> +		reg = <0x00 0x3000000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 219 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm1: pwm@3010000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3010000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 220 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm2: pwm@3020000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3020000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm3: pwm@3030000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3030000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 222 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm4: pwm@3040000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3040000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 223 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm5: pwm@3050000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3050000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 224 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
>  	};
>  
>  	gic500: interrupt-controller@1800000 {

-- 
Regards
Vignesh

  reply	other threads:[~2024-06-21 15:21 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-03 11:29 Udit Kumar
2024-06-21 15:21 ` Vignesh Raghavendra [this message]
2024-06-22  6:17 ` Vignesh Raghavendra

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