From: hejunhao <hejunhao3@huawei.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: <will@kernel.org>, <linux-kernel@vger.kernel.org>,
<mark.rutland@arm.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-doc@vger.kernel.org>, <linuxarm@huawei.com>,
<yangyicong@huawei.com>, <shenyang39@huawei.com>,
<prime.zeng@hisilicon.com>
Subject: Re: [PATCH v3 2/3] drivers/perf: hisi: Add support for HiSilicon UC PMU driver
Date: Fri, 9 Jun 2023 14:17:47 +0800 [thread overview]
Message-ID: <7148da77-056a-06aa-89bf-25f775535685@huawei.com> (raw)
In-Reply-To: <20230608142200.0000753c@Huawei.com>
Hi, Jonathan
On 2023/6/8 21:22, Jonathan Cameron wrote:
> On Thu, 8 Jun 2023 19:37:18 +0800
> Junhao He <hejunhao3@huawei.com> wrote:
>
>
>> On HiSilicon Hip09 platform, there is 4 UC (unified cache) module
> are 4 UC (unified cache) modules
Ok, will fix it.
Thanks.
>> on each chip CCL (CPU Cluster). UC is a cache that provides
>> coherence between NUMA and UMA domains. It is located between L2
>> and Memory System. And many PMU events are supported. Let's support
> Many PMU events are supported.
Ok, will fix it.
Thanks.
>> the UC PMU driver using the HiSilicon uncore PMU framework.
>>
>> * rd_req_en : rd_req_en is the abbreviation of read request tracetag
>> enable and allows user to count only read operations. Details are listed
>> in the hisi-pmu document at Documentation/admin-guide/perf/hisi-pmu.rst
>>
>> * srcid_en & srcid: Allows users to filter statistical information based
>> on specific CPU/ICL by srcid.
>> srcid_en depending on rd_req_en enabled.
> srcid_en depends on rd_req_en being enabled.
Ok, will fix it.
Thanks.
>> * uring_channel: Allows users to filter statistical information based on
>> the specified tx request uring channel.
>> uring_channel only supported events: [0x47 ~ 0x59].
>>
>> Signed-off-by: Junhao He <hejunhao3@huawei.com>
>> Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
> The editorial stuff above is trivial and original text can be easily
> understood. So maintainers may not care. If you happen to be re rolling
> the patch then nice to clean it up.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> .
Sure, Will fix in next version.
Thanks.
next prev parent reply other threads:[~2023-06-09 6:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-08 11:37 [PATCH v3 0/3] Add support for HiSilicon SoC uncore PMU Junhao He
2023-06-08 11:37 ` [PATCH v3 1/3] drivers/perf: hisi: Add support for HiSilicon H60PA and PAv3 PMU driver Junhao He
2023-06-08 11:37 ` [PATCH v3 2/3] drivers/perf: hisi: Add support for HiSilicon UC " Junhao He
2023-06-08 13:22 ` Jonathan Cameron
2023-06-09 6:17 ` hejunhao [this message]
2023-06-08 11:37 ` [PATCH v3 3/3] docs: perf: Add new description for HiSilicon UC PMU Junhao He
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7148da77-056a-06aa-89bf-25f775535685@huawei.com \
--to=hejunhao3@huawei.com \
--cc=Jonathan.Cameron@Huawei.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mark.rutland@arm.com \
--cc=prime.zeng@hisilicon.com \
--cc=shenyang39@huawei.com \
--cc=will@kernel.org \
--cc=yangyicong@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®