Re: [PATCH 1/7] phy: phy-snps-eusb2: fix clock imbalance on phy_exit()

[Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>]

On 5/23/25 11:48, Johan Hovold wrote:
> Make sure to disable all clocks enabled at phy_init() also on
> phy_exit().
>
> Fixes: c4098f3e6134 ("phy: phy-snps-eusb2: add support for exynos2200")
> Cc: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>  drivers/phy/phy-snps-eusb2.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/phy/phy-snps-eusb2.c b/drivers/phy/phy-snps-eusb2.c
> index b73a1d7e57b3..19af3f99692c 100644
> --- a/drivers/phy/phy-snps-eusb2.c
> +++ b/drivers/phy/phy-snps-eusb2.c
> @@ -504,7 +504,7 @@ static int snps_eusb2_hsphy_exit(struct phy *p)
>  {
>  	struct snps_eusb2_hsphy *phy = phy_get_drvdata(p);
>  
> -	clk_disable_unprepare(phy->ref_clk);
> +	clk_bulk_disable_unprepare(phy->data->num_clks, phy->clks);

This shouldn't affect functionality for Exynos 2200, as gates are not
handled manually in the clocks driver.

Anyways, this is good to have for other/future supported SoCs.

Acked-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>

Best regards,
Ivaylo

>  
>  	regulator_bulk_disable(ARRAY_SIZE(phy->vregs), phy->vregs);
>