From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Mike Leach <mike.leach@linaro.org>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: mathieu.poirier@linaro.org, peterz@infradead.org,
mingo@redhat.com, acme@kernel.org,
linux-perf-users@vger.kernel.org, leo.yan@linaro.org,
quic_jinlmao@quicinc.com
Subject: Re: [PATCH v5 01/14] coresight: trace-id: Add API to dynamically assign Trace ID values
Date: Tue, 8 Nov 2022 19:14:27 +0000 [thread overview]
Message-ID: <73d7a338-08f8-73e7-fab0-99dd36de92e7@arm.com> (raw)
In-Reply-To: <20221101163103.17921-2-mike.leach@linaro.org>
On 01/11/2022 16:30, Mike Leach wrote:
> The existing mechanism to assign Trace ID values to sources is limited
> and does not scale for larger multicore / multi trace source systems.
>
> The API introduces functions that reserve IDs based on availabilty
> represented by a coresight_trace_id_map structure. This records the
> used and free IDs in a bitmap.
>
> CPU bound sources such as ETMs use the coresight_trace_id_get_cpu_id
> coresight_trace_id_put_cpu_id pair of functions. The API will record
> the ID associated with the CPU. This ensures that the same ID will be
> re-used while perf events are active on the CPU. The put_cpu_id function
> will pend release of the ID until all perf cs_etm sessions are complete.
>
> For backward compatibility the functions will attempt to use the same
> CPU IDs as the legacy system would have used if these are still available.
>
> Non-cpu sources, such as the STM can use coresight_trace_id_get_system_id /
> coresight_trace_id_put_system_id.
>
> Signed-off-by: Mike Leach <mike.leach@linaro.org>
> ---
> drivers/hwtracing/coresight/Makefile | 2 +-
> drivers/hwtracing/coresight/coresight-core.c | 4 +
> .../hwtracing/coresight/coresight-trace-id.c | 225 ++++++++++++++++++
> .../hwtracing/coresight/coresight-trace-id.h | 154 ++++++++++++
> include/linux/coresight-pmu.h | 10 +
> 5 files changed, 394 insertions(+), 1 deletion(-)
> create mode 100644 drivers/hwtracing/coresight/coresight-trace-id.c
> create mode 100644 drivers/hwtracing/coresight/coresight-trace-id.h
>
> diff --git a/drivers/hwtracing/coresight/coresight-trace-id.h b/drivers/hwtracing/coresight/coresight-trace-id.h
> new file mode 100644
> index 000000000000..1d27977346b3
> --- /dev/null
> +++ b/drivers/hwtracing/coresight/coresight-trace-id.h
> +/* check an ID is in the valid range */
> +#define IS_VALID_ID(id) \
> + ((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP))
Please could we make this more explicit as it is also used
by code outside the trace-id.c ? i.e, IS_VALID_TRACEID() ?
This stood out, while looking at the users of this helper.
Suzuki
next prev parent reply other threads:[~2022-11-08 19:14 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 16:30 [PATCH v5 00/14] coresight: Add new API to allocate trace source " Mike Leach
2022-11-01 16:30 ` [PATCH v5 01/14] coresight: trace-id: Add API to dynamically assign Trace " Mike Leach
2022-11-08 14:03 ` Suzuki K Poulose
2022-11-22 9:28 ` Mike Leach
2022-11-08 19:14 ` Suzuki K Poulose [this message]
2022-11-01 16:30 ` [PATCH v5 02/14] coresight: Remove obsolete Trace ID unniqueness checks Mike Leach
2022-11-01 16:30 ` [PATCH v5 03/14] coresight: perf: traceid: Add perf ID allocation and notifiers Mike Leach
2022-11-08 15:04 ` Suzuki Kuruppassery Poulose
2022-11-01 16:30 ` [PATCH v5 04/14] coresight: stm: Update STM driver to use Trace ID API Mike Leach
2022-11-01 16:30 ` [PATCH v5 05/14] coresight: etm4x: Update ETM4 " Mike Leach
2022-11-08 22:24 ` Suzuki K Poulose
2022-11-01 16:30 ` [PATCH v5 06/14] coresight: etm3x: Update ETM3 " Mike Leach
2022-11-08 22:25 ` Suzuki K Poulose
2022-11-01 16:30 ` [PATCH v5 07/14] coresight: etmX.X: stm: Remove trace_id() callback Mike Leach
2022-11-01 16:30 ` [PATCH v5 08/14] coresight: trace id: Remove legacy get trace ID function Mike Leach
2022-11-08 17:06 ` Suzuki Kuruppassery Poulose
2022-11-01 16:30 ` [PATCH v5 09/14] perf: cs-etm: Move mapping of Trace ID and cpu into helper function Mike Leach
2022-11-08 23:31 ` Suzuki K Poulose
2022-11-01 16:30 ` [PATCH v5 10/14] perf: cs-etm: Update record event to use new Trace ID protocol Mike Leach
2022-11-08 23:31 ` Suzuki K Poulose
2022-11-01 16:31 ` [PATCH v5 11/14] kernel: events: Export perf_report_aux_output_id() Mike Leach
2022-11-01 16:31 ` [PATCH v5 12/14] perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet Mike Leach
2022-11-09 12:00 ` Suzuki Kuruppassery Poulose
2022-11-01 16:31 ` [PATCH v5 13/14] coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID Mike Leach
2022-11-08 22:49 ` Suzuki K Poulose
2022-11-01 16:31 ` [PATCH v5 14/14] coresight: trace-id: Add debug & test macros to Trace ID allocation Mike Leach
2022-11-09 12:07 ` Suzuki Kuruppassery Poulose
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=73d7a338-08f8-73e7-fab0-99dd36de92e7@arm.com \
--to=suzuki.poulose@arm.com \
--cc=acme@kernel.org \
--cc=coresight@lists.linaro.org \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mathieu.poirier@linaro.org \
--cc=mike.leach@linaro.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=quic_jinlmao@quicinc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome