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From: Ludovic BARRE <ludovic.barre@st.com>
To: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Benjamin Gaignard <benjamin.gaignard@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-gpio@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain
Date: Fri, 23 Feb 2018 17:16:36 +0100	[thread overview]
Message-ID: <73fbc744-872a-8a69-8bf4-a46d7f5b6636@st.com> (raw)
In-Reply-To: <a6dca941-c887-3066-9290-be7590ab8f9b@st.com>



On 02/23/2018 04:46 PM, Ludovic BARRE wrote:
> hi Radoslaw
> 
> The gpio-keys tests it's now functional on H7, great.
> However the gpio-key test only the bank1 (like stm32f429).
> Like the H7 introduce the multi-bank management,
> we must perform complementary test.
> 
> comment below about ack in handler
> 
> On 02/23/2018 09:31 AM, Radoslaw Pietrzyk wrote:
>> - discards setting handle_simple_irq handler for hierarchy interrupts
>> - removes acking in chained irq handler as this is done by
>> irq_chip itself inside handle_edge_irq
>> - removes unneeded irq_domain_ops.xlate callback
>>
>> Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
>> ---
>>   drivers/irqchip/irq-stm32-exti.c | 13 -------------
>>   1 file changed, 13 deletions(-)
>>
>> diff --git a/drivers/irqchip/irq-stm32-exti.c 
>> b/drivers/irqchip/irq-stm32-exti.c
>> index 36f0fbe..8013a87 100644
>> --- a/drivers/irqchip/irq-stm32-exti.c
>> +++ b/drivers/irqchip/irq-stm32-exti.c
>> @@ -79,13 +79,6 @@ static unsigned long stm32_exti_pending(struct 
>> irq_chip_generic *gc)
>>       return irq_reg_readl(gc, stm32_bank->pr_ofst);
>>   }
>> -static void stm32_exti_irq_ack(struct irq_chip_generic *gc, u32 mask)
>> -{
>> -    const struct stm32_exti_bank *stm32_bank = gc->private;
>> -
>> -    irq_reg_writel(gc, mask, stm32_bank->pr_ofst);
>> -}
>> -
>>   static void stm32_irq_handler(struct irq_desc *desc)
>>   {
>>       struct irq_domain *domain = irq_desc_get_handler_data(desc);
>> @@ -106,7 +99,6 @@ static void stm32_irq_handler(struct irq_desc *desc)
>>               for_each_set_bit(n, &pending, IRQS_PER_BANK) {
>>                   virq = irq_find_mapping(domain, irq_base + n);
>>                   generic_handle_irq(virq);
>> -                stm32_exti_irq_ack(gc, BIT(n));
> 
> the while loop " while ((pending = " has been introduce while original
> upstream of this driver in V2 to V3
> https://patchwork.ozlabs.org/patch/604190/
> https://patchwork.ozlabs.org/patch/665242/
> 
> the "ack" is needed to acknowledge the irq which are handled and which 
> is not the original irq for which we enter.
> 
>>               }
>>           }
>>       }
>> @@ -176,16 +168,12 @@ static int stm32_irq_set_wake(struct irq_data 
>> *data, unsigned int on)
>>   static int stm32_exti_alloc(struct irq_domain *d, unsigned int virq,
>>                   unsigned int nr_irqs, void *data)
>>   {
>> -    struct irq_chip_generic *gc;
>>       struct irq_fwspec *fwspec = data;
>>       irq_hw_number_t hwirq;
>>       hwirq = fwspec->param[0];
>> -    gc = irq_get_domain_generic_chip(d, hwirq);
>>       irq_map_generic_chip(d, virq, hwirq);
>> -    irq_domain_set_info(d, virq, hwirq, &gc->chip_types->chip, gc,
>> -                handle_simple_irq, NULL, NULL);
> 
> I see if it is not disturb the multi-bank.

you are right, normally irq_domain_set_info is already set in
irq_map_generic_chip.

> 
>>       return 0;
>>   }
>> @@ -200,7 +188,6 @@ static void stm32_exti_free(struct irq_domain *d, 
>> unsigned int virq,
>>   struct irq_domain_ops irq_exti_domain_ops = {
>>       .map    = irq_map_generic_chip,
>> -    .xlate    = irq_domain_xlate_onetwocell,
>>       .alloc  = stm32_exti_alloc,
>>       .free    = stm32_exti_free,
>>   };
>>
> 
> BR
> Ludo

  reply	other threads:[~2018-02-23 16:17 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-21 13:50 [PATCH 0/2] Optimizes, cleans up and enhances stm32-exti irq hierarchy Radoslaw Pietrzyk
2018-02-21 13:50 ` [PATCH 1/2] ARM: irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain Radoslaw Pietrzyk
2018-02-22 10:55   ` [1/2] " Ludovic BARRE
2018-02-22 11:01     ` Radosław Pietrzyk
2018-02-23  8:34       ` Radosław Pietrzyk
2018-02-21 13:50 ` [PATCH 2/2] ARM: pinctrl: stm32: Optimizes and enhances stm32gpio irqchip Radoslaw Pietrzyk
2018-02-21 15:11   ` Alexandre Torgue
2018-02-21 15:12   ` Alexandre Torgue
2018-03-01 21:04   ` Linus Walleij
2018-03-01 21:24     ` Radosław Pietrzyk
2018-03-02  8:14       ` Alexandre Torgue
2018-03-02  8:37         ` Radosław Pietrzyk
2018-03-02  8:49           ` Alexandre Torgue
2018-02-23  8:31 ` [PATCH v2 0/2] v2 patches for stm32-exti irq hierarchy Radoslaw Pietrzyk
2018-02-23  8:31 ` [PATCH v2 1/2] irqchip: stm32: Optimizes and cleans up stm32-exti irq_domain Radoslaw Pietrzyk
2018-02-23  8:42   ` Thomas Gleixner
2018-02-23  9:05     ` Radosław Pietrzyk
2018-03-14 11:09     ` Marc Zyngier
     [not found]       ` <CAFvLkMSZjgFMAe0VRc0AEpG89BgXkfMb9+ivJ8V+PFighOoDRA@mail.gmail.com>
2018-03-14 12:04         ` Marc Zyngier
2018-04-19 13:24           ` Ludovic BARRE
     [not found]             ` <CAFvLkMQv3AajhFaRxsBt+UzdGFeix_FA-0mhtYqwMo2x0zgrnA@mail.gmail.com>
2018-04-20  7:18               ` Ludovic BARRE
2018-02-23 15:46   ` Ludovic BARRE
2018-02-23 16:16     ` Ludovic BARRE [this message]
2018-02-23 17:37     ` Radosław Pietrzyk
2018-02-26 15:23       ` Ludovic BARRE
2018-02-23  8:31 ` [PATCH v2 2/2] pinctrl: stm32: Optimizes and enhances stm32gpio irqchip Radoslaw Pietrzyk
2018-02-26 15:25   ` Ludovic BARRE
2018-03-01 22:41   ` Linus Walleij

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