From: "Alexis Lothoré" <alexis.lothore@bootlin.com>
To: "Marek Behún" <kabel@kernel.org>, "Andrew Lunn" <andrew@lunn.ch>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Richard Cochran <richardcochran@gmail.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
paul.arola@telus.com, scott.roberts@telus.com
Subject: Re: [PATCH net-next 2/2] net: dsa: mv88e6xxx: enable support for 88E6361 switch
Date: Fri, 19 May 2023 15:16:57 +0200 [thread overview]
Message-ID: <7419ffc0-b292-97c4-fee6-610a1a841265@bootlin.com> (raw)
In-Reply-To: <20230519143713.1ac9c7a1@thinkpad>
On 5/19/23 14:38, Marek Behún wrote:
> On Thu, 18 May 2023 14:58:00 +0200
> Andrew Lunn <andrew@lunn.ch> wrote:
>
>>>>> + [MV88E6361] = {
>>>>> + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6361,
>>>>> + .family = MV88E6XXX_FAMILY_6393,
>>>>> + .name = "Marvell 88E6361",
>>>>> + .num_databases = 4096,
>>>>> + .num_macs = 16384,
>>>>> + .num_ports = 11,
>>>>> + /* Ports 1, 2 and 8 are not routed */
>>>>> + .invalid_port_mask = BIT(1) | BIT(2) | BIT(8),
>>>>> + .num_internal_phys = 5,
>>>>
>>>> Which ports have internal PHYs? 2, 3, 4, 5, 6, 7 ? What does
>>>> mv88e6xxx_phy_is_internal() return for these ports, and
>>>> mv88e6xxx_get_capsmv88e6xxx_get_caps()? I'm wondering if you actually
>>>> need to list 8 here?
>>>
>>> Indeed there is something wrong here too. I need to tune
>>> mv88e6393x_phylink_get_caps to reflect 88E6361 differences.
>>>
>>> As stated above, port 3 to 7 are the ones with internal PHY.
>>> For mv88e6xxx_phy_is_internal, I see that it is merely comparing the port index
>>> to the number of internal phys, so in this case it would advertise (wrongly)
>>> that ports 0 to 4 have internal phys.
>>
>> Ports 1 and 2 should hopefully be protected by the
>> invalid_port_mask. It should not even be possible to create those
>> ports. port 0 is interesting, and possibly currently broken on
>> 6393. Please take a look at that.
>
> Why would port 0 be broken on 6393x ?
By "broken", I guess Andrew means that if we feed port 0 to
mv88e6xxx_phy_is_internal, it will return true, which is wrong since there is no
internal phy for port 0 on 6393X ?
>
> Marek
--
Alexis Lothoré, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2023-05-19 13:16 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-17 20:34 [PATCH net-next 0/2] net: dsa: mv88e6xxx: add 88E6361 support alexis.lothore
2023-05-17 20:34 ` [PATCH net-next 1/2] dt-bindings: net: dsa: marvell: add MV88E6361 switch to compatibility list alexis.lothore
2023-05-17 20:39 ` Andrew Lunn
2023-05-18 21:43 ` Conor Dooley
2023-08-24 18:49 ` airat.gl
2023-08-24 22:11 ` Andrew Lunn
2023-08-25 8:21 ` Alexis Lothoré
2023-05-17 20:34 ` [PATCH net-next 2/2] net: dsa: mv88e6xxx: enable support for 88E6361 switch alexis.lothore
2023-05-17 20:51 ` Andrew Lunn
2023-05-18 9:11 ` Alexis Lothoré
2023-05-18 12:58 ` Andrew Lunn
2023-05-19 12:38 ` Marek Behún
2023-05-19 13:16 ` Alexis Lothoré [this message]
2023-05-19 13:30 ` Andrew Lunn
2023-05-19 13:32 ` Marek Behún
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