From: "David E. Box" <david.e.box@linux.intel.com>
To: hansg@kernel.org, ilpo.jarvinen@linux.intel.com,
irenic.rajneesh@gmail.com
Cc: "David E. Box" <david.e.box@linux.intel.com>,
linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org,
srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com
Subject: [PATCH v8 11/15] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper
Date: Fri, 12 Jun 2026 14:01:52 -0700 [thread overview]
Message-ID: <75ca738c88729f37f286f342c1fe8ff86f7eafe7.1781294741.git.david.e.box@linux.intel.com> (raw)
In-Reply-To: <cover.1781294741.git.david.e.box@linux.intel.com>
Move DEVID/PWRMBASE extraction into pmc_ssram_get_devid_pwrmbase().
This is a preparatory refactor to place functionality in a common helper
for reuse by a subsequent patch. Additionally add missing bits.h
include and define SSRAM_BASE_ADDR_MASK for the address extraction mask.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
V8 - No changes
V7 - No changes
V6 - No changes
V5 - No changes
V4 - No changes
V3 - No changes
V2 changes:
- Added missing <linux/bits.h> include for GENMASK_ULL() used in get_base()
- Defined SSRAM_BASE_ADDR_MASK macro to replace magic mask constant
GENMASK_ULL(63, 3)
.../platform/x86/intel/pmc/ssram_telemetry.c | 33 ++++++++++++-------
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/platform/x86/intel/pmc/ssram_telemetry.c
index 05f213aa108f..211d842df449 100644
--- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c
+++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c
@@ -5,6 +5,7 @@
* Copyright (c) 2023, Intel Corporation.
*/
+#include <linux/bits.h>
#include <linux/cleanup.h>
#include <linux/device.h>
#include <linux/intel_vsec.h>
@@ -22,6 +23,7 @@
#define SSRAM_PCH_OFFSET 0x60
#define SSRAM_IOE_OFFSET 0x68
#define SSRAM_DEVID_OFFSET 0x70
+#define SSRAM_BASE_ADDR_MASK GENMASK_ULL(63, 3)
DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_T))
@@ -40,6 +42,23 @@ static const struct ssram_type pci_main = {
static struct pmc_ssram_telemetry *pmc_ssram_telems;
static bool device_probed;
+static inline u64 get_base(void __iomem *addr, u32 offset)
+{
+ return lo_hi_readq(addr + offset) & SSRAM_BASE_ADDR_MASK;
+}
+
+static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int pmc_idx)
+{
+ u64 pwrm_base;
+ u16 devid;
+
+ pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
+ devid = readw(ssram + SSRAM_DEVID_OFFSET);
+
+ pmc_ssram_telems[pmc_idx].devid = devid;
+ pmc_ssram_telems[pmc_idx].base_addr = pwrm_base;
+}
+
static int
pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void __iomem *ssram)
{
@@ -76,18 +95,12 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void __iomem
return intel_vsec_register(&pcidev->dev, &info);
}
-static inline u64 get_base(void __iomem *addr, u32 offset)
-{
- return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3);
-}
-
static int
pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_idx, u32 offset)
{
void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram = NULL;
void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram = NULL;
- u64 ssram_base, pwrm_base;
- u16 devid;
+ u64 ssram_base;
ssram_base = pci_resource_start(pcidev, 0);
tmp_ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
@@ -112,11 +125,7 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_idx, u3
ssram = no_free_ptr(tmp_ssram);
}
- pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
- devid = readw(ssram + SSRAM_DEVID_OFFSET);
-
- pmc_ssram_telems[pmc_idx].devid = devid;
- pmc_ssram_telems[pmc_idx].base_addr = pwrm_base;
+ pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx);
/* Find and register and PMC telemetry entries */
return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram);
--
2.43.0
next prev parent reply other threads:[~2026-06-12 21:02 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-12 21:01 [PATCH v8 00/15] Add ACPI-based PMT discovery support for Intel PMC David E. Box
2026-06-12 21:01 ` [PATCH v8 01/15] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-06-12 21:01 ` [PATCH v8 02/15] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-06-12 21:01 ` [PATCH v8 03/15] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-06-12 21:01 ` [PATCH v8 04/15] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-06-12 21:01 ` [PATCH v8 05/15] platform/x86/intel/pmt: Cache the telemetry discovery header David E. Box
2026-06-12 21:01 ` [PATCH v8 06/15] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-06-12 21:01 ` [PATCH v8 07/15] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description David E. Box
2026-06-12 21:01 ` [PATCH v8 08/15] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-06-12 21:01 ` [PATCH v8 09/15] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-06-12 21:01 ` [PATCH v8 10/15] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-06-12 21:01 ` David E. Box [this message]
2026-06-12 21:01 ` [PATCH v8 12/15] platform/x86/intel/pmc/ssram: Switch to static array with per-index probe state David E. Box
2026-06-12 21:01 ` [PATCH v8 13/15] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-06-12 21:01 ` [PATCH v8 14/15] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-06-12 21:01 ` [PATCH v8 15/15] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
2026-06-14 23:31 ` [PATCH v8 00/15] Add ACPI-based PMT discovery support for Intel PMC Ilpo Järvinen
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