Re: [PATCH 1/3] clk: qcom: lcc-msm8960: check regmap_read/regmap_write return values in probe

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 6/2/26 6:49 AM, Herman van Hazendonk wrote:
> The PLL4 L-register read in probe was used to select between the 393 MHz
> and 492 MHz frequency plans without checking whether the underlying
> regmap operation succeeded; a silent failure would leave the rcg
> structures pointing at whatever default they had at startup (the 393
> MHz plan) and the chosen plan could be wrong for the running PLL,
> producing incorrect audio clock rates without any diagnostic.
> 
> The unconditional write to register 0xc4 that arms the LPASS Primary
> PLL mux on PLL4 had the same problem: a bus-level failure would leave
> the mux at its default (PXO) and every downstream LCC clock would be
> sourced from the wrong parent without a warning.
> 
> Use dev_err_probe() in both spots so the error is surfaced (and the
> deferred-probe state machine handles the EPROBE_DEFER-from-bus-arbiter
> case correctly) and the driver does not bind in a known-bad
> configuration.
> 
> Signed-off-by: Herman van Hazendonk <github.com@herrie.org>
> ---

Can this happen in practice?

LCC seems to be a device on the MMIO bus..

Konrad