From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Jiaxin Yu <jiaxin.yu@mediatek.com>, broonie@kernel.org
Cc: lgirdwood@gmail.com, tiwai@suse.com, robh+dt@kernel.org,
matthias.bgg@gmail.com, perex@perex.cz, p.zabel@pengutronix.de,
geert+renesas@glider.be, trevor.wu@mediatek.com,
tzungbi@google.com, aaronyu@google.com, zhangqilong3@huawei.com,
alsa-devel@alsa-project.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [v2 07/17] ASoC: mediatek: mt8186: support pcm in platform driver
Date: Fri, 18 Feb 2022 15:54:23 +0100 [thread overview]
Message-ID: <78474983-a07c-6b1d-797a-d0788f3577b6@collabora.com> (raw)
In-Reply-To: <20220217134205.15400-8-jiaxin.yu@mediatek.com>
Il 17/02/22 14:41, Jiaxin Yu ha scritto:
> This patch adds mt8186 pcm dai driver.
>
> Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
> ---
> sound/soc/mediatek/mt8186/mt8186-dai-pcm.c | 432 +++++++++++++++++++++
> 1 file changed, 432 insertions(+)
> create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-pcm.c
>
> diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-pcm.c b/sound/soc/mediatek/mt8186/mt8186-dai-pcm.c
> new file mode 100644
> index 000000000000..73b3f720ed35
> --- /dev/null
> +++ b/sound/soc/mediatek/mt8186/mt8186-dai-pcm.c
> @@ -0,0 +1,432 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// MediaTek ALSA SoC Audio DAI I2S Control
> +//
> +// Copyright (c) 2022 MediaTek Inc.
> +// Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
> +
> +#include <linux/regmap.h>
> +#include <sound/pcm_params.h>
> +#include "mt8186-afe-common.h"
> +#include "mt8186-afe-gpio.h"
> +#include "mt8186-interconnection.h"
> +
> +struct mtk_afe_pcm_priv {
> + unsigned int id;
> + unsigned int fmt;
> + unsigned int bck_invert;
> + unsigned int lck_invert;
> +};
> +
> +enum AUD_TX_LCH_RPT {
lowercase enumeration names please...
enum aud_tx_lch_rpt {
AUD_TX....BLAH
};
> + AUD_TX_LCH_RPT_NO_REPEAT = 0,
> + AUD_TX_LCH_RPT_REPEAT = 1
> +};
> +
> +enum AUD_VBT_16K_MODE {
> + AUD_VBT_16K_MODE_DISABLE = 0,
> + AUD_VBT_16K_MODE_ENABLE = 1
> +};
> +
> +enum AUD_EXT_MODEM {
> + AUD_EXT_MODEM_SELECT_INTERNAL = 0,
> + AUD_EXT_MODEM_SELECT_EXTERNAL = 1
> +};
> +
> +enum AUD_PCM_SYNC_TYPE {
> + /* bck sync length = 1 */
> + AUD_PCM_ONE_BCK_CYCLE_SYNC = 0,
> + /* bck sync length = PCM_INTF_CON1[9:13] */
> + AUD_PCM_EXTENDED_BCK_CYCLE_SYNC = 1
> +};
> +
> +enum AUD_BT_MODE {
> + AUD_BT_MODE_DUAL_MIC_ON_TX = 0,
> + AUD_BT_MODE_SINGLE_MIC_ON_TX = 1
> +};
> +
> +enum AUD_PCM_AFIFO_SRC {
> + /* slave mode & external modem uses different crystal */
> + AUD_PCM_AFIFO_ASRC = 0,
> + /* slave mode & external modem uses the same crystal */
> + AUD_PCM_AFIFO_AFIFO = 1
> +};
> +
> +enum AUD_PCM_CLOCK_SOURCE {
> + AUD_PCM_CLOCK_MASTER_MODE = 0,
> + AUD_PCM_CLOCK_SLAVE_MODE = 1
> +};
> +
> +enum AUD_PCM_WLEN {
> + AUD_PCM_WLEN_PCM_32_BCK_CYCLES = 0,
> + AUD_PCM_WLEN_PCM_64_BCK_CYCLES = 1
> +};
> +
> +enum AUD_PCM_24BIT {
> + AUD_PCM_24BIT_PCM_16_BITS = 0,
> + AUD_PCM_24BIT_PCM_24_BITS = 1
> +};
> +
> +enum AUD_PCM_MODE {
> + AUD_PCM_MODE_PCM_MODE_8K = 0,
> + AUD_PCM_MODE_PCM_MODE_16K = 1,
> + AUD_PCM_MODE_PCM_MODE_32K = 2,
> + AUD_PCM_MODE_PCM_MODE_48K = 3,
> +};
> +
> +enum AUD_PCM_FMT {
> + AUD_PCM_FMT_I2S = 0,
> + AUD_PCM_FMT_EIAJ = 1,
> + AUD_PCM_FMT_PCM_MODE_A = 2,
> + AUD_PCM_FMT_PCM_MODE_B = 3
> +};
> +
> +enum AUD_BCLK_OUT_INV {
> + AUD_BCLK_OUT_INV_NO_INVERSE = 0,
> + AUD_BCLK_OUT_INV_INVERSE = 1
> +};
> +
> +enum AUD_LRCLK_OUT_INV {
> + AUD_LRCLK_OUT_INV_NO_INVERSE = 0,
> + AUD_LRCLK_OUT_INV_INVERSE = 1
> +};
> +
> +enum AUD_PCM_EN {
> + AUD_PCM_EN_DISABLE = 0,
> + AUD_PCM_EN_ENABLE = 1
> +};
> +
..snip..
> +
> +/* dai ops */
> +static int mtk_dai_pcm_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params,
> + struct snd_soc_dai *dai)
> +{
> + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
> + struct mt8186_afe_private *afe_priv = afe->platform_priv;
> + int pcm_id = dai->id;
> + struct mtk_afe_pcm_priv *pcm_priv = afe_priv->dai_priv[pcm_id];
> + unsigned int rate = params_rate(params);
> + unsigned int rate_reg = mt8186_rate_transform(afe->dev, rate, dai->id);
> + snd_pcm_format_t format = params_format(params);
> + unsigned int data_width =
> + snd_pcm_format_width(format);
> + unsigned int wlen_width =
> + snd_pcm_format_physical_width(format);
> + unsigned int pcm_con = 0;
> +
> + dev_info(afe->dev, "%s(), id %d, stream %d, widget active p %d, c %d\n",
> + __func__,
> + dai->id,
> + substream->stream,
> + dai->playback_widget->active,
> + dai->capture_widget->active);
> + dev_info(afe->dev, "%s(), rate %d, rate_reg %d, data_width %d, wlen_width %d\n",
> + __func__,
> + rate,
> + rate_reg,
> + data_width,
> + wlen_width);
dev_dbg() - also, you don't need one line per variable.
> +
> + if (dai->playback_widget->active || dai->capture_widget->active)
> + return 0;
> +
> + switch (dai->id) {
> + case MT8186_DAI_PCM:
> + pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM_TX_LCH_RPT_SFT;
> + pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM_VBT_16K_MODE_SFT;
> + pcm_con |= AUD_EXT_MODEM_SELECT_EXTERNAL << PCM_EXT_MODEM_SFT;
> + pcm_con |= AUD_PCM_ONE_BCK_CYCLE_SYNC << PCM_SYNC_TYPE_SFT;
> + pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM_BT_MODE_SFT;
> + pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM_BYP_ASRC_SFT;
> + pcm_con |= AUD_PCM_CLOCK_MASTER_MODE << PCM_SLAVE_SFT;
> + pcm_con |= 0 << PCM_SYNC_LENGTH_SFT;
> +
> + /* sampling rate */
> + pcm_con |= rate_reg << PCM_MODE_SFT;
> +
> + /* format */
> + pcm_con |= pcm_priv->fmt << PCM_FMT_SFT;
> +
> + /* 24bit data width */
> + if (data_width > 16)
> + pcm_con |= AUD_PCM_24BIT_PCM_24_BITS << PCM_24BIT_SFT;
> + else
> + pcm_con |= AUD_PCM_24BIT_PCM_16_BITS << PCM_24BIT_SFT;
> +
> + /* wlen width*/
> + if (wlen_width > 16)
> + pcm_con |= AUD_PCM_WLEN_PCM_64_BCK_CYCLES << PCM_WLEN_SFT;
> + else
> + pcm_con |= AUD_PCM_WLEN_PCM_32_BCK_CYCLES << PCM_WLEN_SFT;
> +
> + /* clock invert */
> + pcm_con |= pcm_priv->lck_invert << PCM_SYNC_OUT_INV_SFT;
> + pcm_con |= pcm_priv->bck_invert << PCM_BCLK_OUT_INV_SFT;
> +
> + regmap_update_bits(afe->regmap, PCM_INTF_CON1,
> + 0xfffffffe, pcm_con);
Fits in one line.
> + break;
> + default:
> + dev_info(afe->dev, "%s(), id %d not support\n",
> + __func__, dai->id);
dev_err()
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int mtk_dai_pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
> +{
> + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
> + struct mt8186_afe_private *afe_priv = afe->platform_priv;
> + struct mtk_afe_pcm_priv *pcm_priv = afe_priv->dai_priv[dai->id];
> +
> + if (!pcm_priv) {
> + dev_info(afe->dev, "%s(), tdm_priv == NULL", __func__);
dev_err()
> + return -EINVAL;
> + }
> +
next prev parent reply other threads:[~2022-02-18 14:54 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-17 13:41 [v2 00/17] ASoC: mediatek: Add support for MT8186 SoC Jiaxin Yu
2022-02-17 13:41 ` [v2 01/17] ASoC: mediatek: mt6366: add codec driver Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-05 4:24 ` Jiaxin Yu
2022-03-07 9:07 ` AngeloGioacchino Del Regno
2022-02-17 13:41 ` [v2 02/17] ASoC: mediatek: mt8186: support audsys clock control Jiaxin Yu
2022-02-17 13:41 ` [v2 03/17] ASoC: mediatek: mt8186: support adda in platform driver Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-05 10:49 ` Jiaxin Yu
2022-03-07 9:25 ` AngeloGioacchino Del Regno
2022-02-17 13:41 ` [v2 04/17] ASoC: mediatek: mt8186: support hostless " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-02-17 13:41 ` [v2 05/17] ASoC: mediatek: mt8186: support hw gain " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-02-17 13:41 ` [v2 06/17] ASoC: mediatek: mt8186: support i2s " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-05 11:07 ` Jiaxin Yu
2022-02-17 13:41 ` [v2 07/17] ASoC: mediatek: mt8186: support pcm " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno [this message]
2022-03-05 11:12 ` Jiaxin Yu
2022-02-17 13:41 ` [v2 08/17] ASoC: mediatek: mt8186: support src " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-02-17 13:41 ` [v2 09/17] ASoC: mediatek: mt8186: support tdm " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-03 14:10 ` Jiaxin Yu
2022-03-03 15:08 ` AngeloGioacchino Del Regno
2022-03-03 17:39 ` Jiaxin Yu
2022-02-17 13:41 ` [v2 10/17] ASoC: mediatek: mt8186: support audio clock control " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-03 15:16 ` Jiaxin Yu
2022-03-03 15:17 ` Jiaxin Yu
2022-02-17 13:41 ` [v2 11/17] ASoC: mediatek: mt8186: support gpio " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-03 15:30 ` Jiaxin Yu
2022-02-17 13:42 ` [v2 12/17] ASoC: mediatek: mt8186: add " Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-05 9:10 ` Jiaxin Yu
2022-02-17 13:42 ` [v2 13/17] dt-bindings: mediatek: mt8186: add audio afe document Jiaxin Yu
2022-02-25 16:43 ` Rob Herring
2022-02-17 13:42 ` [v2 14/17] ASoC: mediatek: mt8186: add machine driver with mt6366, da7219 and max98357 Jiaxin Yu
2022-02-18 14:54 ` AngeloGioacchino Del Regno
2022-03-05 8:58 ` Jiaxin Yu
2022-03-07 9:14 ` AngeloGioacchino Del Regno
2022-02-17 13:42 ` [v2 15/17] dt-bindings: mediatek: mt8186: add mt8186-mt6366-da7219-max98357 document Jiaxin Yu
2022-02-17 13:42 ` [v2 16/17] ASoC: mediatek: mt8186: add machine driver with mt6366, rt1019 and rt5682s Jiaxin Yu
2022-02-17 13:42 ` [v2 17/17] dt-bindings: mediatek: mt8186: add mt8186-mt6366-rt1019-rt5682s document Jiaxin Yu
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