From: Ben Horgan <ben.horgan@arm.com>
To: James Morse <james.morse@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <robh@kernel.org>,
Rohit Mathew <rohit.mathew@arm.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
Zeng Heng <zengheng4@huawei.com>,
Lecopzer Chen <lecopzerc@nvidia.com>,
Carl Worth <carl@os.amperecomputing.com>,
shameerali.kolothum.thodi@huawei.com,
D Scott Phillips OS <scott@os.amperecomputing.com>,
lcherian@marvell.com, bobo.shaobowang@huawei.com,
tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com,
Jamie Iles <quic_jiles@quicinc.com>,
Xin Hao <xhao@linux.alibaba.com>,
peternewman@google.com, dfustini@baylibre.com,
amitsinght@marvell.com, David Hildenbrand <david@redhat.com>,
Rex Nie <rex.nie@jaguarmicro.com>,
Dave Martin <dave.martin@arm.com>, Koba Ko <kobak@nvidia.com>
Subject: Re: [RFC PATCH 27/36] arm_mpam: Allow configuration to be applied and restored during cpu online
Date: Mon, 28 Jul 2025 12:59:12 +0100 [thread overview]
Message-ID: <7ab40c09-3922-4e0c-85dd-00ff05be4ce6@arm.com> (raw)
In-Reply-To: <20250711183648.30766-28-james.morse@arm.com>
Hi James,
On 7/11/25 19:36, James Morse wrote:
> When CPUs come online the original configuration should be restored.
> Once the maximum partid is known, allocate an configuration array for
> each component, and reprogram each RIS configuration from this.
>
> The MPAM spec describes how multiple controls can interact. To prevent
> this happening by accident, always reset controls that don't have a
> valid configuration. This allows the same helper to be used for
> configuration and reset.
>
> CC: Dave Martin <Dave.Martin@arm.com>
> Signed-off-by: James Morse <james.morse@arm.com>
> ---
> drivers/platform/arm64/mpam/mpam_devices.c | 236 ++++++++++++++++++--
> drivers/platform/arm64/mpam/mpam_internal.h | 26 ++-
> 2 files changed, 234 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/platform/arm64/mpam/mpam_devices.c b/drivers/platform/arm64/mpam/mpam_devices.c
> index bb3695eb84e9..f3ecfda265d2 100644
> --- a/drivers/platform/arm64/mpam/mpam_devices.c
> +++ b/drivers/platform/arm64/mpam/mpam_devices.c
> @@ -374,12 +374,16 @@ static void mpam_class_destroy(struct mpam_class *class)
> add_to_garbage(class);
> }
>
> +static void __destroy_component_cfg(struct mpam_component *comp);
> +
> static void mpam_comp_destroy(struct mpam_component *comp)
> {
> struct mpam_class *class = comp->class;
>
> lockdep_assert_held(&mpam_list_lock);
>
> + __destroy_component_cfg(comp);
> +
> list_del_rcu(&comp->class_list);
> add_to_garbage(comp);
>
> @@ -909,51 +913,90 @@ static void mpam_reset_msc_bitmap(struct mpam_msc *msc, u16 reg, u16 wd)
> __mpam_write_reg(msc, reg, bm);
> }
>
> -static void mpam_reset_ris_partid(struct mpam_msc_ris *ris, u16 partid)
> +/* Called via IPI. Call while holding an SRCU reference */
> +static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
> + struct mpam_config *cfg)
> {
> u16 bwa_fract = MPAMCFG_MBW_MAX_MAX;
> struct mpam_msc *msc = ris->vmsc->msc;
> struct mpam_props *rprops = &ris->props;
>
> - mpam_assert_srcu_read_lock_held();
> -
> mutex_lock(&msc->part_sel_lock);
> __mpam_part_sel(ris->ris_idx, partid, msc);
>
> - if (mpam_has_feature(mpam_feat_cpor_part, rprops))
> - mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM, rprops->cpbm_wd);
> + if (mpam_has_feature(mpam_feat_cpor_part, rprops)) {
> + if (mpam_has_feature(mpam_feat_cpor_part, cfg))
> + mpam_write_partsel_reg(msc, CPBM, cfg->cpbm);
> + else
> + mpam_reset_msc_bitmap(msc, MPAMCFG_CPBM,
> + rprops->cpbm_wd);
> + }
>
> - if (mpam_has_feature(mpam_feat_mbw_part, rprops))
> - mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM, rprops->mbw_pbm_bits);
> + if (mpam_has_feature(mpam_feat_mbw_part, rprops)) {
> + if (mpam_has_feature(mpam_feat_mbw_part, cfg))
> + mpam_write_partsel_reg(msc, MBW_PBM, cfg->mbw_pbm);
> + else
> + mpam_reset_msc_bitmap(msc, MPAMCFG_MBW_PBM,
> + rprops->mbw_pbm_bits);
> + }
>
> if (mpam_has_feature(mpam_feat_mbw_min, rprops))
> mpam_write_partsel_reg(msc, MBW_MIN, 0);
>
> - if (mpam_has_feature(mpam_feat_mbw_max, rprops))
> - mpam_write_partsel_reg(msc, MBW_MAX, bwa_fract);
> + if (mpam_has_feature(mpam_feat_mbw_max, rprops)) {
> + if (mpam_has_feature(mpam_feat_mbw_max, cfg))
> + mpam_write_partsel_reg(msc, MBW_MAX, cfg->mbw_max);
> + else
> + mpam_write_partsel_reg(msc, MBW_MAX, bwa_fract);
> + }
>
> if (mpam_has_feature(mpam_feat_mbw_prop, rprops))
> mpam_write_partsel_reg(msc, MBW_PROP, bwa_fract);
> mutex_unlock(&msc->part_sel_lock);
> }
>
> +struct reprogram_ris {
> + struct mpam_msc_ris *ris;
> + struct mpam_config *cfg;
> +};
> +
> +/* Call with MSC lock held */
> +static int mpam_reprogram_ris(void *_arg)
> +{
> + u16 partid, partid_max;
> + struct reprogram_ris *arg = _arg;
> + struct mpam_msc_ris *ris = arg->ris;
> + struct mpam_config *cfg = arg->cfg;
> +
> + if (ris->in_reset_state)
> + return 0;
> +
> + spin_lock(&partid_max_lock);
> + partid_max = mpam_partid_max;
> + spin_unlock(&partid_max_lock);
> + for (partid = 0; partid <= partid_max; partid++)
> + mpam_reprogram_ris_partid(ris, partid, cfg);
> +
> + return 0;
> +}
> +
> /*
> * Called via smp_call_on_cpu() to prevent migration, while still being
> * pre-emptible.
> */
> static int mpam_reset_ris(void *arg)
> {
> - u16 partid, partid_max;
> struct mpam_msc_ris *ris = arg;
> + struct reprogram_ris reprogram_arg;
> + struct mpam_config empty_cfg = { 0 };
>
> if (ris->in_reset_state)
> return 0;
>
> - spin_lock(&partid_max_lock);
> - partid_max = mpam_partid_max;
> - spin_unlock(&partid_max_lock);
> - for (partid = 0; partid < partid_max; partid++)
> - mpam_reset_ris_partid(ris, partid);
> + reprogram_arg.ris = ris;
> + reprogram_arg.cfg = &empty_cfg;
> +
> + mpam_reprogram_ris(&reprogram_arg);
>
> return 0;
> }
> @@ -984,13 +1027,11 @@ static int mpam_touch_msc(struct mpam_msc *msc, int (*fn)(void *a), void *arg)
>
> static void mpam_reset_msc(struct mpam_msc *msc, bool online)
> {
> - int idx;
> struct mpam_msc_ris *ris;
>
> mpam_assert_srcu_read_lock_held();
>
> mpam_mon_sel_outer_lock(msc);
> - idx = srcu_read_lock(&mpam_srcu);
> list_for_each_entry_srcu(ris, &msc->ris, msc_list, srcu_read_lock_held(&mpam_srcu)) {
> mpam_touch_msc(msc, &mpam_reset_ris, ris);
>
> @@ -1000,10 +1041,38 @@ static void mpam_reset_msc(struct mpam_msc *msc, bool online)
> */
> ris->in_reset_state = online;
> }
> - srcu_read_unlock(&mpam_srcu, idx);
> mpam_mon_sel_outer_unlock(msc);
> }
>
> +static void mpam_reprogram_msc(struct mpam_msc *msc)
> +{
> + int idx;
> + u16 partid;
> + bool reset;
> + struct mpam_config *cfg;
> + struct mpam_msc_ris *ris;
> +
> + idx = srcu_read_lock(&mpam_srcu);
> + list_for_each_entry_rcu(ris, &msc->ris, msc_list) {
> + if (!mpam_is_enabled() && !ris->in_reset_state) {
> + mpam_touch_msc(msc, &mpam_reset_ris, ris);
> + ris->in_reset_state = true;
> + continue;
> + }
> +
> + reset = true;
> + for (partid = 0; partid <= mpam_partid_max; partid++) {
Do we need to consider 'partid_max_lock' here?
> + cfg = &ris->vmsc->comp->cfg[partid];
> + if (cfg->features)
> + reset = false;
> +
> + mpam_reprogram_ris_partid(ris, partid, cfg);
> + }
> + ris->in_reset_state = reset;
> + }
> + srcu_read_unlock(&mpam_srcu, idx);
> +}
> +
> static void _enable_percpu_irq(void *_irq)
> {
> int *irq = _irq;
> @@ -1025,7 +1094,7 @@ static int mpam_cpu_online(unsigned int cpu)
> _enable_percpu_irq(&msc->reenable_error_ppi);
>
> if (atomic_fetch_inc(&msc->online_refs) == 0)
> - mpam_reset_msc(msc, true);
> + mpam_reprogram_msc(msc);
> }
> srcu_read_unlock(&mpam_srcu, idx);
>
> @@ -1806,6 +1875,43 @@ static void mpam_unregister_irqs(void)
> cpus_read_unlock();
> }
>
> +static void __destroy_component_cfg(struct mpam_component *comp)
> +{
> + add_to_garbage(comp->cfg);
> +}
> +
> +static int __allocate_component_cfg(struct mpam_component *comp)
> +{
> + if (comp->cfg)
> + return 0;
> +
> + comp->cfg = kcalloc(mpam_partid_max + 1, sizeof(*comp->cfg), GFP_KERNEL);
And here?
> + if (!comp->cfg)
> + return -ENOMEM;
> + init_garbage(comp->cfg);
> +
> + return 0;
> +}
> +
> +static int mpam_allocate_config(void)
> +{
> + int err = 0;
> + struct mpam_class *class;
> + struct mpam_component *comp;
> +
> + lockdep_assert_held(&mpam_list_lock);
> +
> + list_for_each_entry(class, &mpam_classes, classes_list) {
> + list_for_each_entry(comp, &class->components, class_list) {
> + err = __allocate_component_cfg(comp);
> + if (err)
> + return err;
> + }
> + }
> +
> + return 0;
> +}
> +
> static void mpam_enable_once(void)
> {
> int err;
> @@ -1817,12 +1923,21 @@ static void mpam_enable_once(void)
> */
> cpus_read_lock();
> mutex_lock(&mpam_list_lock);
> - mpam_enable_merge_features(&mpam_classes);
> + do {
> + mpam_enable_merge_features(&mpam_classes);
>
> - err = mpam_register_irqs();
> - if (err)
> - pr_warn("Failed to register irqs: %d\n", err);
> + err = mpam_allocate_config();
> + if (err) {
> + pr_err("Failed to allocate configuration arrays.\n");
> + break;
> + }
>
> + err = mpam_register_irqs();
> + if (err) {
> + pr_warn("Failed to register irqs: %d\n", err);
> + break;
> + }
> + } while (0);
> mutex_unlock(&mpam_list_lock);
> cpus_read_unlock();
>
> @@ -1861,6 +1976,8 @@ static void mpam_reset_component_locked(struct mpam_component *comp)
> might_sleep();
> lockdep_assert_cpus_held();
>
> + memset(comp->cfg, 0, (mpam_partid_max * sizeof(*comp->cfg)));
And here?
> +
> idx = srcu_read_lock(&mpam_srcu);
> list_for_each_entry_rcu(vmsc, &comp->vmsc, comp_list) {
> msc = vmsc->msc;
> @@ -1963,6 +2080,79 @@ void mpam_enable(struct work_struct *work)
> mpam_enable_once();
> }
>
> +struct mpam_write_config_arg {
> + struct mpam_msc_ris *ris;
> + struct mpam_component *comp;
> + u16 partid;
> +};
> +
> +static int __write_config(void *arg)
> +{
> + struct mpam_write_config_arg *c = arg;
> +
> + mpam_reprogram_ris_partid(c->ris, c->partid, &c->comp->cfg[c->partid]);
> +
> + return 0;
> +}
> +
> +#define maybe_update_config(cfg, feature, newcfg, member, changes) do { \
> + if (mpam_has_feature(feature, newcfg) && \
> + (newcfg)->member != (cfg)->member) { \
> + (cfg)->member = (newcfg)->member; \
> + cfg->features |= (1 << feature); \
> + \
> + (changes) |= (1 << feature); \
> + } \
> +} while (0)
> +
> +static mpam_features_t mpam_update_config(struct mpam_config *cfg,
> + const struct mpam_config *newcfg)
> +{
> + mpam_features_t changes = 0;
> +
> + maybe_update_config(cfg, mpam_feat_cpor_part, newcfg, cpbm, changes);
> + maybe_update_config(cfg, mpam_feat_mbw_part, newcfg, mbw_pbm, changes);
> + maybe_update_config(cfg, mpam_feat_mbw_max, newcfg, mbw_max, changes);
> +
> + return changes;
> +}
> +
> +/* TODO: split into write_config/sync_config */
> +/* TODO: add config_dirty bitmap to drive sync_config */
> +int mpam_apply_config(struct mpam_component *comp, u16 partid,
> + struct mpam_config *cfg)
> +{
> + struct mpam_write_config_arg arg;
> + struct mpam_msc_ris *ris;
> + struct mpam_vmsc *vmsc;
> + struct mpam_msc *msc;
> + int idx;
> +
> + lockdep_assert_cpus_held();
> +
> + /* Don't pass in the current config! */
> + WARN_ON_ONCE(&comp->cfg[partid] == cfg);
> +
> + if (!mpam_update_config(&comp->cfg[partid], cfg))
> + return 0;
> +
> + arg.comp = comp;
> + arg.partid = partid;
> +
> + idx = srcu_read_lock(&mpam_srcu);
> + list_for_each_entry_rcu(vmsc, &comp->vmsc, comp_list) {
> + msc = vmsc->msc;
> +
> + list_for_each_entry_rcu(ris, &vmsc->ris, vmsc_list) {
> + arg.ris = ris;
> + mpam_touch_msc(msc, __write_config, &arg);
> + }
> + }
> + srcu_read_unlock(&mpam_srcu, idx);
> +
> + return 0;
> +}
> +
> /*
> * MSC that are hidden under caches are not created as platform devices
> * as there is no cache driver. Caches are also special-cased in
> diff --git a/drivers/platform/arm64/mpam/mpam_internal.h b/drivers/platform/arm64/mpam/mpam_internal.h
> index 1a24424b48df..029ec89f56f2 100644
> --- a/drivers/platform/arm64/mpam/mpam_internal.h
> +++ b/drivers/platform/arm64/mpam/mpam_internal.h
> @@ -190,11 +190,7 @@ struct mpam_props {
> u16 num_mbwu_mon;
> };
>
> -static inline bool mpam_has_feature(enum mpam_device_features feat,
> - struct mpam_props *props)
> -{
> - return (1 << feat) & props->features;
> -}
> +#define mpam_has_feature(_feat, x) ((1 << (_feat)) & (x)->features)
>
> static inline void mpam_set_feature(enum mpam_device_features feat,
> struct mpam_props *props)
> @@ -225,6 +221,17 @@ struct mpam_class {
> struct mpam_garbage garbage;
> };
>
> +struct mpam_config {
> + /* Which configuration values are valid. 0 is used for reset */
> + mpam_features_t features;
> +
> + u32 cpbm;
> + u32 mbw_pbm;
> + u16 mbw_max;
> +
> + struct mpam_garbage garbage;
> +};
> +
> struct mpam_component {
> u32 comp_id;
>
> @@ -233,6 +240,12 @@ struct mpam_component {
>
> cpumask_t affinity;
>
> + /*
> + * Array of configuration values, indexed by partid.
> + * Read from cpuhp callbacks, hold the cpuhp lock when writing.
> + */
> + struct mpam_config *cfg;
> +
> /* member of mpam_class:components */
> struct list_head class_list;
>
> @@ -297,6 +310,9 @@ extern u8 mpam_pmg_max;
> void mpam_enable(struct work_struct *work);
> void mpam_disable(struct work_struct *work);
>
> +int mpam_apply_config(struct mpam_component *comp, u16 partid,
> + struct mpam_config *cfg);
> +
> int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level,
> cpumask_t *affinity);
>
--
Thanks,
Ben
next prev parent reply other threads:[~2025-07-28 11:59 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-11 18:36 [RFC PATCH 00/36] arm_mpam: Add basic mpam driver James Morse
2025-07-11 18:36 ` [RFC PATCH 01/36] cacheinfo: Set cache 'id' based on DT data James Morse
2025-07-11 18:36 ` [RFC PATCH 02/36] cacheinfo: Add arch hook to compress CPU h/w id into 32 bits for cache-id James Morse
2025-07-11 18:36 ` [RFC PATCH 03/36] arm64: cacheinfo: Provide helper to compress MPIDR value into u32 James Morse
2025-07-11 18:36 ` [RFC PATCH 04/36] cacheinfo: Expose the code to generate a cache-id from a device_node James Morse
2025-07-14 11:40 ` Ben Horgan
2025-07-25 17:08 ` James Morse
2025-07-28 8:37 ` Ben Horgan
2025-07-11 18:36 ` [RFC PATCH 05/36] ACPI / PPTT: Add a helper to fill a cpumask from a processor container James Morse
2025-07-17 7:58 ` Shaopeng Tan (Fujitsu)
2025-07-25 17:06 ` James Morse
2025-07-22 14:28 ` Jonathan Cameron
2025-07-25 17:05 ` James Morse
2025-07-23 14:42 ` Ben Horgan
2025-07-25 17:05 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 06/36] ACPI / PPTT: Stop acpi_count_levels() expecting callers to clear levels James Morse
2025-07-16 15:51 ` Jonathan Cameron
2025-07-25 17:05 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 07/36] ACPI / PPTT: Find cache level by cache-id James Morse
2025-07-14 11:42 ` Ben Horgan
2025-08-05 17:06 ` James Morse
2025-07-16 16:21 ` [RFC PATCH 07/36] ACPI / PPTT: Find cache level by cache-idUIRE Jonathan Cameron
2025-08-05 17:06 ` [RFC PATCH 07/36] ACPI / PPTT: Find cache level by cache-id James Morse
2025-07-11 18:36 ` [RFC PATCH 08/36] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id James Morse
2025-07-16 16:24 ` Jonathan Cameron
2025-08-05 17:06 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 09/36] arm64: kconfig: Add Kconfig entry for MPAM James Morse
2025-07-16 16:26 ` Jonathan Cameron
2025-07-11 18:36 ` [RFC PATCH 10/36] ACPI / MPAM: Parse the MPAM table James Morse
2025-07-16 17:07 ` Jonathan Cameron
2025-07-23 16:39 ` Ben Horgan
2025-08-05 17:07 ` James Morse
2025-08-15 9:33 ` Ben Horgan
2025-07-28 10:08 ` Jonathan Cameron
2025-08-05 17:08 ` James Morse
2025-08-05 17:07 ` James Morse
2025-07-24 10:50 ` Ben Horgan
2025-08-05 17:08 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 11/36] dt-bindings: arm: Add MPAM MSC binding James Morse
2025-07-11 21:43 ` Rob Herring
2025-08-05 17:08 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 12/36] platform: arm64: Move ec devices to an ec subdirectory James Morse
2025-07-21 16:32 ` Jonathan Cameron
2025-08-06 18:03 ` James Morse
2025-07-24 10:56 ` Ben Horgan
2025-08-06 18:03 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 13/36] arm_mpam: Add probe/remove for mpam msc driver and kbuild boiler plate James Morse
2025-07-24 11:02 ` Ben Horgan
2025-08-06 18:03 ` James Morse
2025-07-24 12:09 ` Catalin Marinas
2025-08-06 18:04 ` James Morse
2025-08-07 17:50 ` Drew Fustini
2025-07-11 18:36 ` [RFC PATCH 14/36] arm_mpam: Add support for memory controller MSC on DT platforms James Morse
2025-07-11 18:36 ` [RFC PATCH 15/36] arm_mpam: Add the class and component structures for ris firmware described James Morse
2025-07-11 18:36 ` [RFC PATCH 16/36] arm_mpam: Add MPAM MSC register layout definitions James Morse
2025-07-17 1:04 ` Shaopeng Tan (Fujitsu)
2025-08-06 18:04 ` James Morse
2025-07-24 14:02 ` Ben Horgan
2025-08-06 18:05 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 17/36] arm_mpam: Add cpuhp callbacks to probe MSC hardware James Morse
2025-07-24 14:13 ` Ben Horgan
2025-08-06 18:07 ` James Morse
2025-07-29 6:11 ` Baisheng Gao
2025-08-06 18:07 ` James Morse
2025-08-05 8:46 ` Jonathan Cameron
2025-07-11 18:36 ` [RFC PATCH 18/36] arm_mpam: Probe MSCs to find the supported partid/pmg values James Morse
2025-07-11 18:36 ` [RFC PATCH 19/36] arm_mpam: Add helpers for managing the locking around the mon_sel registers James Morse
2025-07-11 18:36 ` [RFC PATCH 20/36] arm_mpam: Probe the hardware features resctrl supports James Morse
2025-07-24 15:08 ` Ben Horgan
2025-07-28 16:16 ` Jonathan Cameron
2025-08-07 18:26 ` James Morse
2025-07-28 8:56 ` Ben Horgan
2025-08-08 7:20 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 21/36] arm_mpam: Merge supported features during mpam_enable() into mpam_class James Morse
2025-07-28 9:15 ` Ben Horgan
2025-07-11 18:36 ` [RFC PATCH 22/36] arm_mpam: Reset MSC controls from cpu hp callbacks James Morse
2025-07-28 9:49 ` Ben Horgan
2025-08-08 7:05 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 23/36] arm_mpam: Add a helper to touch an MSC from any CPU James Morse
2025-07-11 18:36 ` [RFC PATCH 24/36] arm_mpam: Extend reset logic to allow devices to be reset any time James Morse
2025-07-28 10:22 ` Ben Horgan
2025-08-08 7:07 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 25/36] arm_mpam: Register and enable IRQs James Morse
2025-07-16 7:31 ` Shaopeng Tan (Fujitsu)
2025-08-08 7:08 ` James Morse
2025-07-17 1:08 ` Shaopeng Tan (Fujitsu)
2025-08-08 7:07 ` James Morse
2025-07-22 15:06 ` Jonathan Cameron
2025-08-08 7:11 ` James Morse
2025-07-28 10:49 ` Ben Horgan
2025-08-08 7:11 ` James Morse
2025-08-04 16:53 ` Fenghua Yu
2025-08-08 7:12 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 26/36] arm_mpam: Use a static key to indicate when mpam is enabled James Morse
2025-07-11 18:36 ` [RFC PATCH 27/36] arm_mpam: Allow configuration to be applied and restored during cpu online James Morse
2025-07-16 6:49 ` Shaopeng Tan (Fujitsu)
2025-08-08 7:13 ` James Morse
2025-07-28 11:59 ` Ben Horgan [this message]
2025-07-28 15:34 ` Dave Martin
2025-08-08 7:16 ` James Morse
2025-08-08 7:14 ` James Morse
2025-08-04 16:39 ` Fenghua Yu
2025-08-08 7:17 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 28/36] arm_mpam: Probe and reset the rest of the features James Morse
2025-07-11 18:36 ` [RFC PATCH 29/36] arm_mpam: Add helpers to allocate monitors James Morse
2025-07-11 18:36 ` [RFC PATCH 30/36] arm_mpam: Add mpam_msmon_read() to read monitor value James Morse
2025-07-28 13:02 ` Ben Horgan
2025-07-11 18:36 ` [RFC PATCH 31/36] arm_mpam: Track bandwidth counter state for overflow and power management James Morse
2025-07-11 18:36 ` [RFC PATCH 32/36] arm_mpam: Probe for long/lwd mbwu counters James Morse
2025-07-11 18:36 ` [RFC PATCH 33/36] arm_mpam: Use long MBWU counters if supported James Morse
2025-07-28 13:46 ` Ben Horgan
2025-08-08 7:19 ` James Morse
2025-07-11 18:36 ` [RFC PATCH 34/36] arm_mpam: Add helper to reset saved mbwu state James Morse
2025-07-11 18:36 ` [RFC PATCH 35/36] arm_mpam: Add kunit test for bitmap reset James Morse
2025-07-11 18:36 ` [RFC PATCH 36/36] arm_mpam: Add kunit tests for props_mismatch() James Morse
2025-08-01 16:09 ` [RFC PATCH 00/36] arm_mpam: Add basic mpam driver Jonathan Cameron
2025-08-08 7:23 ` James Morse
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7ab40c09-3922-4e0c-85dd-00ff05be4ce6@arm.com \
--to=ben.horgan@arm.com \
--cc=amitsinght@marvell.com \
--cc=baolin.wang@linux.alibaba.com \
--cc=bobo.shaobowang@huawei.com \
--cc=carl@os.amperecomputing.com \
--cc=dave.martin@arm.com \
--cc=david@redhat.com \
--cc=dfustini@baylibre.com \
--cc=james.morse@arm.com \
--cc=kobak@nvidia.com \
--cc=lcherian@marvell.com \
--cc=lecopzerc@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=peternewman@google.com \
--cc=quic_jiles@quicinc.com \
--cc=rex.nie@jaguarmicro.com \
--cc=robh@kernel.org \
--cc=rohit.mathew@arm.com \
--cc=scott@os.amperecomputing.com \
--cc=sdonthineni@nvidia.com \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=tan.shaopeng@fujitsu.com \
--cc=xhao@linux.alibaba.com \
--cc=zengheng4@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®