From: Xin Li <xin@zytor.com>
To: Chao Gao <chao.gao@intel.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
pbonzini@redhat.com, seanjc@google.com, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
x86@kernel.org, hpa@zytor.com
Subject: Re: [PATCH v1 2/4] KVM: x86: Introduce MSR read/write emulation helpers
Date: Thu, 31 Jul 2025 09:40:41 -0700 [thread overview]
Message-ID: <7af6dcf5-fbcd-4173-a588-38cf6c536282@zytor.com> (raw)
In-Reply-To: <aItGzjhpfzIbG+Op@intel.com>
On 7/31/2025 3:34 AM, Chao Gao wrote:
>> -fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
>> +static fastpath_t handle_set_msr_irqoff(struct kvm_vcpu *vcpu, u32 msr, int reg)
>
> How about __handle_fastpath_set_msr_irqoff()? It's better to keep
> "fastpath" in the function name to convey that this function is for
> fastpath only.
This is now a static function with return type fastpath_t, so I guess
it's okay to remove fastpath from its name (It looks that Sean prefers
shorter function names if they contains enough information).
But if the protocol is to have "fastpath" in all fast path function
names, I can change it.
>
>> {
>> - u32 msr = kvm_rcx_read(vcpu);
>> u64 data;
>> fastpath_t ret;
>> bool handled;
>> @@ -2174,11 +2190,19 @@ fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
>>
>> switch (msr) {
>> case APIC_BASE_MSR + (APIC_ICR >> 4):
>> - data = kvm_read_edx_eax(vcpu);
>> + if (reg == VCPU_EXREG_EDX_EAX)
>> + data = kvm_read_edx_eax(vcpu);
>> + else
>> + data = kvm_register_read(vcpu, reg);
>
> ...
>
>> +
>> handled = !handle_fastpath_set_x2apic_icr_irqoff(vcpu, data);
>> break;
>> case MSR_IA32_TSC_DEADLINE:
>> - data = kvm_read_edx_eax(vcpu);
>> + if (reg == VCPU_EXREG_EDX_EAX)
>> + data = kvm_read_edx_eax(vcpu);
>> + else
>> + data = kvm_register_read(vcpu, reg);
>> +
>
> Hoist this chunk out of the switch clause to avoid duplication.
I thought about it, but didn't do so because the original code doesn't
read the MSR data from registers when a MSR is not being handled in the
fast path, which saves some cycles in most cases.
next prev parent reply other threads:[~2025-07-31 16:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-30 17:46 [PATCH v1 0/4] KVM: VMX: Handle the immediate form of MSR instructions Xin Li (Intel)
2025-07-30 17:46 ` [PATCH v1 1/4] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions Xin Li (Intel)
2025-07-30 17:46 ` [PATCH v1 2/4] KVM: x86: Introduce MSR read/write emulation helpers Xin Li (Intel)
2025-07-31 10:34 ` Chao Gao
2025-07-31 16:40 ` Xin Li [this message]
2025-07-31 17:19 ` Xin Li
2025-08-01 0:47 ` Sean Christopherson
2025-08-01 1:35 ` Xin Li
2025-08-01 14:37 ` Sean Christopherson
2025-08-01 16:27 ` Xin Li
2025-07-30 17:46 ` [PATCH v1 3/4] KVM: VMX: Handle the immediate form of MSR instructions Xin Li (Intel)
2025-07-31 11:04 ` Chao Gao
2025-07-31 16:53 ` Xin Li
2025-07-31 22:10 ` Xin Li
2025-07-30 17:46 ` [PATCH v1 4/4] KVM: x86: Advertise support for " Xin Li (Intel)
2025-08-01 14:39 ` Sean Christopherson
2025-08-01 16:11 ` Xin Li
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