From: Xin Li <xin@zytor.com>
To: Sean Christopherson <seanjc@google.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
pbonzini@redhat.com, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org,
hpa@zytor.com, chao.gao@intel.com
Subject: Re: [PATCH v1 4/4] KVM: x86: Advertise support for the immediate form of MSR instructions
Date: Fri, 1 Aug 2025 09:11:33 -0700 [thread overview]
Message-ID: <4133bdb5-be2c-4594-aba2-511cecb5a343@zytor.com> (raw)
In-Reply-To: <aIzRhGVgZXPXNwA1@google.com>
On 8/1/2025 7:39 AM, Sean Christopherson wrote:
> On Wed, Jul 30, 2025, Xin Li (Intel) wrote:
>> Advertise support for the immediate form of MSR instructions to userspace
>> if the instructions are supported by the underlying CPU.
>
> SVM needs to explicitly clear the capability so that KVM doesn't over-advertise
> support if AMD ever implements X86_FEATURE_MSR_IMM.
>
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index ca550c4fa174..7e7821ee8ee1 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -5311,8 +5311,12 @@ static __init void svm_set_cpu_caps(void)
> /* CPUID 0x8000001F (SME/SEV features) */
> sev_set_cpu_caps();
>
> - /* Don't advertise Bus Lock Detect to guest if SVM support is absent */
> + /*
> + * Clear capabilities that are automatically configured by common code,
> + * but that require explicit SVM support (that isn't yet implemented).
> + */
> kvm_cpu_cap_clear(X86_FEATURE_BUS_LOCK_DETECT);
> + kvm_cpu_cap_clear(X86_FEATURE_MSR_IMM);
> }
>
> static __init int svm_hardware_setup(void)
>
Nice catch!
Yes, a feature needing explicit enabling effort can't be blindly
advertised until the support on all sub-arch is ready. I.e., I need to
disable it on non-Intel CPUs because it's only done for Intel.
prev parent reply other threads:[~2025-08-01 16:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-30 17:46 [PATCH v1 0/4] KVM: VMX: Handle " Xin Li (Intel)
2025-07-30 17:46 ` [PATCH v1 1/4] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions Xin Li (Intel)
2025-07-30 17:46 ` [PATCH v1 2/4] KVM: x86: Introduce MSR read/write emulation helpers Xin Li (Intel)
2025-07-31 10:34 ` Chao Gao
2025-07-31 16:40 ` Xin Li
2025-07-31 17:19 ` Xin Li
2025-08-01 0:47 ` Sean Christopherson
2025-08-01 1:35 ` Xin Li
2025-08-01 14:37 ` Sean Christopherson
2025-08-01 16:27 ` Xin Li
2025-07-30 17:46 ` [PATCH v1 3/4] KVM: VMX: Handle the immediate form of MSR instructions Xin Li (Intel)
2025-07-31 11:04 ` Chao Gao
2025-07-31 16:53 ` Xin Li
2025-07-31 22:10 ` Xin Li
2025-07-30 17:46 ` [PATCH v1 4/4] KVM: x86: Advertise support for " Xin Li (Intel)
2025-08-01 14:39 ` Sean Christopherson
2025-08-01 16:11 ` Xin Li [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4133bdb5-be2c-4594-aba2-511cecb5a343@zytor.com \
--to=xin@zytor.com \
--cc=bp@alien8.de \
--cc=chao.gao@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=hpa@zytor.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®