From: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
To: "jmattson@google.com" <jmattson@google.com>,
"Gao, Chao" <chao.gao@intel.com>,
"seanjc@google.com" <seanjc@google.com>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"Annapurve, Vishal" <vannapurve@google.com>,
"Chatre, Reinette" <reinette.chatre@intel.com>,
"Li, Xiaoyao" <xiaoyao.li@intel.com>,
"Aktas, Erdem" <erdemaktas@google.com>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"mlevitsk@redhat.com" <mlevitsk@redhat.com>,
"Yamahata, Isaku" <isaku.yamahata@intel.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V4 3/4] KVM: x86: Add a capability to configure bus frequency for APIC timer
Date: Tue, 16 Apr 2024 17:08:19 +0000 [thread overview]
Message-ID: <7b9651b233e43af66be47bd5a20297ca2d7c7e4a.camel@intel.com> (raw)
In-Reply-To: <6146ef9f9e5a17a1940b0efb571c5143b0e9ef8f.1711035400.git.reinette.chatre@intel.com>
On Thu, 2024-03-21 at 09:37 -0700, Reinette Chatre wrote:
> From: Isaku Yamahata <isaku.yamahata@intel.com>
>
> Add KVM_CAP_X86_APIC_BUS_FREQUENCY capability to configure the APIC
> bus clock frequency for APIC timer emulation.
> Allow KVM_ENABLE_CAPABILITY(KVM_CAP_X86_APIC_BUS_FREQUENCY) to set the
> frequency in nanoseconds. When using this capability, the user space
> VMM should configure CPUID leaf 0x15 to advertise the frequency.
>
> Vishal reported that the TDX guest kernel expects a 25MHz APIC bus
> frequency but ends up getting interrupts at a significantly higher rate.
>
> The TDX architecture hard-codes the core crystal clock frequency to
> 25MHz and mandates exposing it via CPUID leaf 0x15. The TDX architecture
> does not allow the VMM to override the value.
>
> In addition, per Intel SDM:
> "The APIC timer frequency will be the processor’s bus clock or core
> crystal clock frequency (when TSC/core crystal clock ratio is
> enumerated in CPUID leaf 0x15) divided by the value specified in
> the divide configuration register."
>
> The resulting 25MHz APIC bus frequency conflicts with the KVM hardcoded
> APIC bus frequency of 1GHz.
>
> The KVM doesn't enumerate CPUID leaf 0x15 to the guest unless the user
> space VMM sets it using KVM_SET_CPUID. If the CPUID leaf 0x15 is
> enumerated, the guest kernel uses it as the APIC bus frequency. If not,
> the guest kernel measures the frequency based on other known timers like
> the ACPI timer or the legacy PIT. As reported by Vishal the TDX guest
> kernel expects a 25MHz timer frequency but gets timer interrupt more
> frequently due to the 1GHz frequency used by KVM.
>
> To ensure that the guest doesn't have a conflicting view of the APIC bus
> frequency, allow the userspace to tell KVM to use the same frequency that
> TDX mandates instead of the default 1Ghz.
>
> There are several options to address this:
> 1. Make the KVM able to configure APIC bus frequency (this series).
> Pro: It resembles the existing hardware. The recent Intel CPUs
> adapts 25MHz.
> Con: Require the VMM to emulate the APIC timer at 25MHz.
> 2. Make the TDX architecture enumerate CPUID leaf 0x15 to configurable
> frequency or not enumerate it.
> Pro: Any APIC bus frequency is allowed.
> Con: Deviates from TDX architecture.
> 3. Make the TDX guest kernel use 1GHz when it's running on KVM.
> Con: The kernel ignores CPUID leaf 0x15.
> 4. Change CPUID leaf 0x15 under TDX to report the crystal clock frequency
> as 1 GHz.
> Pro: This has been the virtual APIC frequency for KVM guests for 13
> years.
> Pro: This requires changing only one hard-coded constant in TDX.
> Con: It doesn't work with other VMMs as TDX isn't specific to KVM.
> Con: Core crystal clock frequency is also used to calculate TSC
> frequency.
> Con: If it is configured to value different from hardware, it will
> break the correctness of INTEL-PT Mini Time Count (MTC) packets
> in TDs.
>
> Reported-by: Vishal Annapurve <vannapurve@google.com>
> Closes:
> https://lore.kernel.org/lkml/20231006011255.4163884-1-vannapurve@google.com/
Is Closes appropriate, given the issue Vishal hit was on non-upstream code?
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> Co-developed-by: Reinette Chatre <reinette.chatre@intel.com>
> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
next prev parent reply other threads:[~2024-04-16 17:08 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-21 16:37 [PATCH V4 0/4] KVM: x86: Make bus clock frequency for vAPIC timer configurable Reinette Chatre
2024-03-21 16:37 ` [PATCH V4 1/4] KVM: x86: hyper-v: Calculate APIC bus frequency for Hyper-V Reinette Chatre
2024-04-16 17:07 ` Edgecombe, Rick P
2024-03-21 16:37 ` [PATCH V4 2/4] KVM: x86: Make nsec per APIC bus cycle a VM variable Reinette Chatre
2024-04-16 17:08 ` Edgecombe, Rick P
2024-03-21 16:37 ` [PATCH V4 3/4] KVM: x86: Add a capability to configure bus frequency for APIC timer Reinette Chatre
2024-04-16 17:08 ` Edgecombe, Rick P [this message]
2024-04-16 21:28 ` Reinette Chatre
2024-04-17 3:37 ` Xiaoyao Li
2024-03-21 16:37 ` [PATCH V4 4/4] KVM: selftests: Add test for configure of x86 APIC bus frequency Reinette Chatre
2024-04-16 17:09 ` [PATCH V4 0/4] KVM: x86: Make bus clock frequency for vAPIC timer configurable Edgecombe, Rick P
2024-04-24 16:13 ` Sean Christopherson
2024-04-24 16:38 ` Edgecombe, Rick P
2024-04-24 17:23 ` Sean Christopherson
2024-04-24 18:10 ` Edgecombe, Rick P
2024-04-24 19:57 ` Sean Christopherson
2024-04-24 21:20 ` Reinette Chatre
2024-04-25 16:17 ` Sean Christopherson
2024-04-25 16:39 ` Reinette Chatre
2024-04-24 21:07 ` Reinette Chatre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7b9651b233e43af66be47bd5a20297ca2d7c7e4a.camel@intel.com \
--to=rick.p.edgecombe@intel.com \
--cc=chao.gao@intel.com \
--cc=erdemaktas@google.com \
--cc=isaku.yamahata@intel.com \
--cc=jmattson@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mlevitsk@redhat.com \
--cc=pbonzini@redhat.com \
--cc=reinette.chatre@intel.com \
--cc=seanjc@google.com \
--cc=vannapurve@google.com \
--cc=vkuznets@redhat.com \
--cc=xiaoyao.li@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®