From: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Biju Das <biju.das.jz@bp.renesas.com>,
Magnus Damm <magnus.damm@gmail.com>
Subject: Re: [PATCH v7 5/6] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK clock handling
Date: Thu, 21 Aug 2025 11:52:38 +0300 [thread overview]
Message-ID: <7bffc8e2-ccdd-4a92-bbc6-95c7c99d7e4a@ideasonboard.com> (raw)
In-Reply-To: <20250728201435.3505594-6-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi,
On 28/07/2025 23:14, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add LPCLK clock support in the RZ/G2L MIPI DSI driver via the optional
> clock API. This clock is required by some SoCs like RZ/V2H(P) for proper
> DPHY configuration, whereas it is absent on others like RZ/G2L.
In the DT binding lpclk is present for all SoCs. Is that an error in the
binding, then? And if I read the binding correctly, it's mandatory for
all SoCs, so why is it optional in the driver?
Tomi
> Introduce a new `lpclk` field in the `rzg2l_mipi_dsi` structure and
> conditionally acquire the "lpclk" clock using `devm_clk_get_optional()`
> during probe. This allows LPCLK-aware SoCs to pass the clock via device
> tree without impacting existing platforms.
>
> Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v6->v7:
> - New patch
> Note, this patch was previously part of series [0].
> [0] https://lore.kernel.org/all/20250609225630.502888-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
> ---
> drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index f87337c3cbb5..893a90c7a886 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -68,6 +68,7 @@ struct rzg2l_mipi_dsi {
> struct drm_bridge *next_bridge;
>
> struct clk *vclk;
> + struct clk *lpclk;
>
> enum mipi_dsi_pixel_format format;
> unsigned int num_data_lanes;
> @@ -979,6 +980,10 @@ static int rzg2l_mipi_dsi_probe(struct platform_device *pdev)
> if (IS_ERR(dsi->vclk))
> return PTR_ERR(dsi->vclk);
>
> + dsi->lpclk = devm_clk_get_optional(dsi->dev, "lpclk");
> + if (IS_ERR(dsi->lpclk))
> + return PTR_ERR(dsi->lpclk);
> +
> dsi->rstc = devm_reset_control_get_optional_exclusive(dsi->dev, "rst");
> if (IS_ERR(dsi->rstc))
> return dev_err_probe(dsi->dev, PTR_ERR(dsi->rstc),
next prev parent reply other threads:[~2025-08-21 8:52 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-28 20:14 [PATCH v7 0/6] Add support for DU/DSI clocks and DSI driver support for the Renesas RZ/V2H(P) SoC Prabhakar
2025-07-28 20:14 ` [PATCH v7 1/6] clk: renesas: rzv2h-cpg: Add instance field to struct pll Prabhakar
2025-08-15 5:11 ` Biju Das
2025-08-19 13:05 ` Geert Uytterhoeven
2025-07-28 20:14 ` [PATCH v7 2/6] clk: renesas: rzv2h-cpg: Add support for DSI clocks Prabhakar
2025-08-15 5:13 ` Biju Das
2025-08-19 13:14 ` Geert Uytterhoeven
2025-08-20 21:10 ` Lad, Prabhakar
2025-07-28 20:14 ` [PATCH v7 3/6] clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC Prabhakar
2025-08-15 5:14 ` Biju Das
2025-08-19 13:14 ` Geert Uytterhoeven
2025-07-28 20:14 ` [PATCH v7 4/6] dt-bindings: display: bridge: renesas,dsi: Document RZ/V2H(P) and RZ/V2N Prabhakar
2025-07-28 20:27 ` Lad, Prabhakar
2025-08-19 10:40 ` Geert Uytterhoeven
2025-08-21 8:47 ` [PATCH v7 4/6] dt-bindings: display: bridge: renesas, dsi: " Tomi Valkeinen
2025-07-28 20:14 ` [PATCH v7 5/6] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK clock handling Prabhakar
2025-08-21 8:52 ` Tomi Valkeinen [this message]
2025-07-28 20:14 ` [PATCH v7 6/6] drm: renesas: rz-du: mipi_dsi: Add support for RZ/V2H(P) SoC Prabhakar
2025-08-21 9:28 ` Tomi Valkeinen
2025-08-22 7:01 ` Biju Das
2025-08-22 7:05 ` Tomi Valkeinen
2025-08-27 12:34 ` Lad, Prabhakar
2025-08-27 12:41 ` Lad, Prabhakar
2025-08-19 13:48 ` [PATCH v7 0/6] Add support for DU/DSI clocks and DSI driver support for the Renesas " Geert Uytterhoeven
2025-08-19 14:54 ` Laurent Pinchart
2025-08-20 21:03 ` Lad, Prabhakar
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