* [PATCH 2/3] perfmon x86 infra(take 2): add AMD Northbridge MSR definition
@ 2008-03-07 21:05 stephane eranian
0 siblings, 0 replies; only message in thread
From: stephane eranian @ 2008-03-07 21:05 UTC (permalink / raw)
To: linux-kernel; +Cc: Andrew Morton, ak, Ingo Molnar, tglx, Robert Richter
adds AMD Northbridge config MSR definition
Signed-off-by: Stephane Eranian <eranian@gmail.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
--- a/include/asm-x86/msr-index.h
+++ b/include/asm-x86/msr-index.h
@@ -83,6 +83,7 @@
/* AMD64 MSRs. Not complete. See the architecture manual for a more
complete list. */
+#define MSR_AMD64_NB_CFG 0xc001001f
#define MSR_AMD64_IBSFETCHCTL 0xc0011030
#define MSR_AMD64_IBSFETCHLINAD 0xc0011031
#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2008-03-07 21:06 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2008-03-07 21:05 [PATCH 2/3] perfmon x86 infra(take 2): add AMD Northbridge MSR definition stephane eranian
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®