From: Usama Anjum <usama.anjum@foss.arm.com>
To: Carl Worth <carl@os.amperecomputing.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Taehyun Noh <taehyun@utexas.edu>,
usama.anjum@foss.arm.com, Peter Collingbourne <pcc@google.com>
Subject: Re: [PATCH v2 2/2] arm64: mte: Set TCMA1 whenever MTE is present in the kernel
Date: Thu, 22 Jan 2026 10:23:01 +0000 [thread overview]
Message-ID: <7e47cccb-5d9f-470d-9de1-8caddc300646@foss.arm.com> (raw)
In-Reply-To: <20251030-mte-tighten-tco-v2-2-e259dda9d5b3@os.amperecomputing.com>
On 15/01/2026 11:07 pm, Carl Worth wrote:
> Set the TCMA1 bit so that access to TTBR1 addresses with 0xf in their
> tag bits will be treated as tag unchecked.
>
> This is important to avoid unwanted tag checking on some
> systems. Specifically, SCTLR_EL1.TCF can be set to indicate that no
> tag check faults are desired. But the architecture doesn't guarantee
> that in this case the system won't still perform tag checks.
>
> Use TCMA1 to ensure that undesired tag checks are not performed. This
> bit was already set in the KASAN case. Adding it to the non-KASAN case
> prevents tag checking since all TTBR1 address will have a value of 0xf
> in their tag bits.
>
> This patch has been measured on an Ampere system to improve the following:
>
> * Eliminate over 98% of kernel-side tag checks during "perf bench
> futex hash", as measured with "perf stat".
>
> * Eliminate all MTE overhead (was previously a 25% performance
> penalty) from the Phoronix pts/memcached benchmark (1:10 Set:Get
> ration with 96 cores).
>
> Reported-by: Taehyun Noh <taehyun@utexas.edu>
> Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: Carl Worth <carl@os.amperecomputing.com>
Fixes tag is required here so that the fix traverses to the stable
kernels. I've not found the most appropriate commit:
973b9e373306 ("arm64: mte: move register initialization to C")
bfc62c598527 ("arm64: kasan: allow enabling in-kernel MTE")
In my opinion, bfc62c598527 should be in the fixes-by tag. At a minimum,
the back porting should be done till 973b9e373306.
> ---
> arch/arm64/mm/proc.S | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> index 5d907ce3b6d3..22866b49be37 100644
> --- a/arch/arm64/mm/proc.S
> +++ b/arch/arm64/mm/proc.S
> @@ -48,14 +48,14 @@
> #define TCR_KASAN_SW_FLAGS 0
> #endif
>
> -#ifdef CONFIG_KASAN_HW_TAGS
> -#define TCR_MTE_FLAGS TCR_EL1_TCMA1 | TCR_EL1_TBI1 | TCR_EL1_TBID1
> -#elif defined(CONFIG_ARM64_MTE)
> +#ifdef CONFIG_ARM64_MTE
> /*
> * The mte_zero_clear_page_tags() implementation uses DC GZVA, which relies on
> - * TBI being enabled at EL1.
> + * TBI being enabled at EL1. TCMA1 is needed to treat accesses with the
> + * match-all tag (0xF) as Tag Unchecked, irrespective of the SCTLR_EL1.TCF
> + * setting.
> */
> -#define TCR_MTE_FLAGS TCR_EL1_TBI1 | TCR_EL1_TBID1
> +#define TCR_MTE_FLAGS TCR_EL1_TCMA1 | TCR_EL1_TBI1 | TCR_EL1_TBID1
> #else
> #define TCR_MTE_FLAGS 0
> #endif
>
next prev parent reply other threads:[~2026-01-22 10:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-15 23:07 [PATCH v2 0/2] arm64: mte: Improve performance by explicitly disabling unwanted tag checking Carl Worth
2026-01-15 23:07 ` [PATCH v2 1/2] arm64: mte: Clarify kernel MTE policy and manipulation of TCO Carl Worth
2026-01-19 18:17 ` Catalin Marinas
2026-01-20 19:44 ` Taehyun Noh
2026-01-15 23:07 ` [PATCH v2 2/2] arm64: mte: Set TCMA1 whenever MTE is present in the kernel Carl Worth
2026-01-19 17:57 ` Catalin Marinas
2026-01-22 10:23 ` Usama Anjum [this message]
2026-01-22 11:49 ` Catalin Marinas
2026-01-27 11:39 ` [PATCH v2 0/2] arm64: mte: Improve performance by explicitly disabling unwanted tag checking Will Deacon
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