From: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
To: William Wu <william.wu@rock-chips.com>,
Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
Cc: "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"frank.wang@rock-chips.com" <frank.wang@rock-chips.com>,
"jianwei.zheng@rock-chips.com" <jianwei.zheng@rock-chips.com>,
"yangbin@rock-chips.com" <yangbin@rock-chips.com>
Subject: Re: [PATCH] usb: dwc2: Disable clock gating feature on Rockchip SoCs
Date: Tue, 26 Dec 2023 07:26:22 +0000 [thread overview]
Message-ID: <7e6ccec1-2e4d-97c0-8a85-e38bad11f056@synopsys.com> (raw)
In-Reply-To: <1703575199-23638-1-git-send-email-william.wu@rock-chips.com>
Hi,
On 12/26/23 11:19, William Wu wrote:
> The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
> When a clock gating is enabled, system hangs.
>
> Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
> ---
> drivers/usb/dwc2/params.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index fb03162..eb677c3 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
> p->lpm_clock_gating = false;
> p->besl = false;
> p->hird_threshold_en = false;
> + p->no_clock_gating = true;
> }
>
> static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
prev parent reply other threads:[~2023-12-26 7:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-26 7:19 William Wu
2023-12-26 7:26 ` Minas Harutyunyan [this message]
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