From: Andrew Lunn <andrew@lunn.ch>
To: Bartosz Wawrzyniak <bwawrzyn@cisco.com>
Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, nicolas.ferre@microchip.com,
claudiu.beznea@microchip.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, xe-linux-external@cisco.com,
danielwa@cisco.com, olicht@cisco.com, mawierzb@cisco.com
Subject: Re: [PATCH] net: macb: Set MDIO clock divisor for pclk higher than 160MHz
Date: Thu, 16 Mar 2023 20:34:45 +0100 [thread overview]
Message-ID: <7f3d0f2c-8bf9-41aa-8a7f-79407753df3b@lunn.ch> (raw)
In-Reply-To: <20230316100339.1302212-1-bwawrzyn@cisco.com>
On Thu, Mar 16, 2023 at 10:03:39AM +0000, Bartosz Wawrzyniak wrote:
> Currently macb sets clock divisor for pclk up to 160 MHz.
> Function gem_mdc_clk_div was updated to enable divisor
> for higher values of pclk.
>
> Signed-off-by: Bartosz Wawrzyniak <bwawrzyn@cisco.com>
> ---
> drivers/net/ethernet/cadence/macb.h | 2 ++
> drivers/net/ethernet/cadence/macb_main.c | 6 +++++-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 14dfec4db8f9..c1fc91c97cee 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -692,6 +692,8 @@
> #define GEM_CLK_DIV48 3
> #define GEM_CLK_DIV64 4
> #define GEM_CLK_DIV96 5
> +#define GEM_CLK_DIV128 6
> +#define GEM_CLK_DIV224 7
Do these divisors exist for all variants? I'm just wondering why these
are being added now, rather than back in 2011-03-09.
Andrew
next prev parent reply other threads:[~2023-03-16 19:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-16 10:03 Bartosz Wawrzyniak
2023-03-16 10:35 ` Michal Kubiak
2023-03-16 16:11 ` Nicolas Ferre
2023-03-16 19:34 ` Andrew Lunn [this message]
2023-03-17 14:02 ` Nicolas Ferre
2023-03-17 14:28 ` Andrew Lunn
2023-03-19 8:50 ` patchwork-bot+netdevbpf
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