From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Leo Yan <leo.yan@arm.com>
Cc: Carl Worth <carl@os.amperecomputing.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 1/3] coresight: tmc: add the handle of the event to the path
Date: Mon, 22 Sep 2025 17:19:40 +0800 [thread overview]
Message-ID: <808e57a4-8f1e-4870-894e-2eb05ec7a134@oss.qualcomm.com> (raw)
In-Reply-To: <20250922082920.GB516577@e132581.arm.com>
On 9/22/2025 4:29 PM, Leo Yan wrote:
> On Mon, Sep 22, 2025 at 03:31:39PM +0800, Jie Gan wrote:
>> From: Carl Worth <carl@os.amperecomputing.com>
>>
>> The handle is essential for retrieving the AUX_EVENT of each CPU and is
>> required in perf mode. It has been added to the coresight_path so that
>> dependent devices can access it from the path when needed.
>>
>> Fixes: 080ee83cc361 ("Coresight: Change functions to accept the coresight_path")
>> Signed-off-by: Carl Worth <carl@os.amperecomputing.com>
>> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> ---
>> drivers/hwtracing/coresight/coresight-etm-perf.c | 1 +
>> drivers/hwtracing/coresight/coresight-tmc-etr.c | 3 ++-
>> include/linux/coresight.h | 10 ++++++----
>> 3 files changed, 9 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
>> index f677c08233ba..5c256af6e54a 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
>> @@ -520,6 +520,7 @@ static void etm_event_start(struct perf_event *event, int flags)
>> goto out;
>>
>> path = etm_event_cpu_path(event_data, cpu);
>> + path->handle = handle;
>> /* We need a sink, no need to continue without one */
>> sink = coresight_get_sink(path);
>> if (WARN_ON_ONCE(!sink))
>> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
>> index b07fcdb3fe1a..1040f73f0537 100644
>> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
>> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
>> @@ -1327,7 +1327,8 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
>> struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev,
>> enum cs_mode mode, void *data)
>> {
>> - struct perf_output_handle *handle = data;
>> + struct coresight_path *path = data;
>> + struct perf_output_handle *handle = path->handle;
>> struct etr_perf_buffer *etr_perf;
>>
>> switch (mode) {
>> diff --git a/include/linux/coresight.h b/include/linux/coresight.h
>> index 6de59ce8ef8c..4591121ae1d4 100644
>> --- a/include/linux/coresight.h
>> +++ b/include/linux/coresight.h
>> @@ -332,12 +332,14 @@ static struct coresight_dev_list (var) = { \
>>
>> /**
>> * struct coresight_path - data needed by enable/disable path
>> - * @path_list: path from source to sink.
>> - * @trace_id: trace_id of the whole path.
>> + * @path_list: path from source to sink.
>> + * @trace_id: trace_id of the whole path.
>> + * struct perf_output_handle: handle of the aux_event.
>
> s/struct perf_output_handle/@handle/
Hi Leo,
Thanks for pointing out. I actually missed this error during the code
review...
Jie
>
> Otherwise, LGTM:
>
> Reviewed-by: Leo Yan <leo.yan@arm.com>
>
>> */
>> struct coresight_path {
>> - struct list_head path_list;
>> - u8 trace_id;
>> + struct list_head path_list;
>> + u8 trace_id;
>> + struct perf_output_handle *handle;
>> };
>>
>> enum cs_mode {
>>
>> --
>> 2.34.1
>>
>>
next prev parent reply other threads:[~2025-09-22 9:19 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-22 7:31 [PATCH RFC 0/3] coresight: replace the void pointer with coresight_path pointer Jie Gan
2025-09-22 7:31 ` [PATCH RFC 1/3] coresight: tmc: add the handle of the event to the path Jie Gan
2025-09-22 8:29 ` Leo Yan
2025-09-22 9:19 ` Jie Gan [this message]
2025-09-22 17:31 ` Carl Worth
2025-09-23 1:49 ` Jie Gan
2025-09-24 10:21 ` Mike Leach
2025-09-24 16:42 ` Suzuki K Poulose
2025-09-25 10:10 ` James Clark
2025-09-25 16:01 ` Leo Yan
2025-09-25 16:04 ` Leo Yan
2025-09-26 10:05 ` Mike Leach
2025-09-24 16:28 ` Carl Worth
2025-09-22 7:31 ` [PATCH RFC 2/3] coresight: change helper_ops to accept coresight_path Jie Gan
2025-09-22 8:34 ` Leo Yan
2025-09-22 17:33 ` Carl Worth
2025-09-22 7:31 ` [PATCH RFC 3/3] coresight: change the sink_ops " Jie Gan
2025-09-22 8:46 ` Leo Yan
2025-09-22 17:34 ` Carl Worth
2025-09-22 17:26 ` [PATCH RFC 0/3] coresight: replace the void pointer with coresight_path pointer Carl Worth
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=808e57a4-8f1e-4870-894e-2eb05ec7a134@oss.qualcomm.com \
--to=jie.gan@oss.qualcomm.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=carl@os.amperecomputing.com \
--cc=coresight@lists.linaro.org \
--cc=james.clark@linaro.org \
--cc=leo.yan@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mike.leach@linaro.org \
--cc=suzuki.poulose@arm.com \
--cc=tingwei.zhang@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®