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From: Qunqin Zhao <zhaoqunqin@loongson.cn>
To: Borislav Petkov <bp@alien8.de>, Qunqin Zhao <zhaoqunqin@163.com>
Cc: tony.luck@intel.com, linux-edac@vger.kernel.org,
	chenhuacai@kernel.org, linux-kernel@vger.kernel.org,
	Wang Jinwei <wangjinwei@loongson.cn>,
	Yulong Wang <wangyulong@loongson.cn>,
	Dongyan Qian <qiandongyan@loongson.cn>,
	Chao Li <lichao@loongson.cn>,
	Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH v6 2/4] EDAC/loongson: Encode node and MC info into mc_idx
Date: Tue, 10 Nov 2026 15:47:20 +0800	[thread overview]
Message-ID: <809041a2-ebdd-409d-a1f4-3ac7884513d2@loongson.cn> (raw)
In-Reply-To: <20261110064106.GAavK8ghva7DgZ35DK@fat_crate.local>


在 2026/11/10 14:41, Borislav Petkov 写道:
> On Thu, Nov 05, 2026 at 10:55:30AM +0800, Qunqin Zhao wrote:
>> From: Wang Jinwei <wangjinwei@loongson.cn>
>>
>> On Loongson multi-node systems, memory controllers are distributed across
>> multiple nodes. Encode node and MC information into mc_idx so that sysfs
>> entries uniquely identify each controller.
>>
>> The driver gets mc-idx from ACPI _DSD property if firmware provides it.
>> If not, it falls back to edac_device_alloc_index() for legacy firmware
>> compatibility.
> I am still not buying this tinkering so lemme try again.
>
> If you cannot read mc_idx from ACPI, then by lack of options, all your nodes
> belong to memory controller 0. There's no other choice.
>
> And you do init it to 0:
>
>         mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
> 			   ^^^
>
>                             sizeof(struct loongson_pvt));
>
> and the subsequent property read tries to get it.
>
> So, IOW, your MC index is only valid when it is not 0.
>
> IOW, this ontop of yours. Completely untested ofc.
>
> ---
>
> diff --git a/drivers/edac/loongson_edac.c b/drivers/edac/loongson_edac.c
> index 3c5d29941a38..2132264a6d7f 100644
> --- a/drivers/edac/loongson_edac.c
> +++ b/drivers/edac/loongson_edac.c
> @@ -25,7 +25,6 @@ struct loongson_pvt {
>  	 */
>  	int last_ce_count;
>  	u32 mcs_per_node;
> -	bool mc_idx_valid;
>  };
>  
>  static int read_ecc(struct mem_ctl_info *mci)
> @@ -56,7 +55,7 @@ static void loongson_check(struct mem_ctl_info *mci)
>  	if (add <= 0)
>  		return;
>  
> -	if (pvt->mc_idx_valid) {
> +	if (pvt->mc_idx) {
>  		node = mci->mc_idx / pvt->mcs_per_node;
>  		mc = mci->mc_idx % pvt->mcs_per_node;
>  		snprintf(other_detail, sizeof(other_detail), "node:%d mc:%d", node, mc);
> @@ -82,14 +81,12 @@ static void dimm_config_init(struct mem_ctl_info *mci)
>  	dimm->grain = 8;
>  }
>  
> -static void pvt_init(struct mem_ctl_info *mci, void __iomem *vbase,
> -		     bool mc_idx_valid, u32 mcs_per_node)
> +static void pvt_init(struct mem_ctl_info *mci, void __iomem *vbase, u32 mcs_per_node)
>  {
>  	struct loongson_pvt *pvt = mci->pvt_info;
>  
>  	pvt->ecc_base = vbase;
>  	pvt->last_ce_count = read_ecc(mci);
> -	pvt->mc_idx_valid = mc_idx_valid;
>  	pvt->mcs_per_node = mcs_per_node;
>  }
>  
> @@ -100,7 +97,6 @@ static int loongson_probe(struct platform_device *pdev)
>  	struct device *dev = &pdev->dev;
>  	void __iomem *vbase;
>  	u32 mcs_per_node;
> -	bool mc_idx_valid = true;
>  	int ret;
>  
>  	vbase = devm_platform_ioremap_resource(pdev, 0);
> @@ -129,15 +125,12 @@ static int loongson_probe(struct platform_device *pdev)
>  	mci->error_desc.grain = 8;
>  	mci->edac_check = loongson_check;
>  
> -	if (device_property_read_u32(dev, "mc-idx", &mci->mc_idx)) {
> -		mci->mc_idx = edac_device_alloc_index();
> -		mc_idx_valid = false;
> -	}
> +	device_property_read_u32(dev, "mc-idx", &mci->mc_idx);
>  
>  	if (device_property_read_u32(dev, "mcs-per-node", &mcs_per_node) || mcs_per_node == 0)
>  		mcs_per_node = 4;
>  
> -	pvt_init(mci, vbase, mc_idx_valid, mcs_per_node);
> +	pvt_init(mci, vbase, mcs_per_node);
>  	dimm_config_init(mci);
>  
>  	ret = edac_mc_add_mc(mci);

"all your nodes belong to memory controller 0"
I don't quite follow this sentence. There are four memory controllers on LS3C6000/S.

On firmware without mc-idx there can still be more than one  memory controller

Each probes with edac_mc_alloc(0, ...),  so if we leave mc_idx at 0 the 

second controller hits the "duplicate  mc_idx" check in add_mc_to_global_list() 

and edac_mc_add_mc() returns  non zero.


Qunqin,

Thanks.

>


  reply	other threads:[~2026-11-10  7:50 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-05  2:55 [PATCH v6 0/4] EDAC/loongson: Improvements for Loongson EDAC driver Qunqin Zhao
2026-11-05  2:55 ` [PATCH v6 1/4] EDAC/loongson: Rename driver-local symbols Qunqin Zhao
2026-11-05  7:10   ` Huacai Chen
2026-11-05  2:55 ` [PATCH v6 2/4] EDAC/loongson: Encode node and MC info into mc_idx Qunqin Zhao
2026-11-10  6:41   ` Borislav Petkov
2026-11-10  7:47     ` Qunqin Zhao [this message]
2026-11-10  8:03       ` Borislav Petkov
2026-11-10  8:23         ` Qunqin Zhao
2026-11-10 18:31           ` Borislav Petkov
2026-11-11  6:37             ` Qunqin Zhao
2026-11-11  8:08               ` Borislav Petkov
2026-11-11  8:33                 ` Qunqin Zhao
2026-11-05  2:55 ` [PATCH v6 3/4] EDAC/loongson: Get DIMM size from ACPI _DSM method Qunqin Zhao
2026-11-05  2:55 ` [PATCH v6 4/4] EDAC/loongson: Add CS4-7 timeout filter for cross-node access Qunqin Zhao

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