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From: Thomas Zimmermann <tzimmermann@suse.de>
To: "René Rebe" <rene@exactco.de>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Cc: Dave Airlie <airlied@redhat.com>
Subject: Re: [PATCH V2] drm/mgag200: Fix big-endian support
Date: Mon, 8 Dec 2025 09:29:53 +0100	[thread overview]
Message-ID: <816e40d2-e451-4d70-bc44-e07562138b1b@suse.de> (raw)
In-Reply-To: <20251205.182405.876575799174263183.rene@exactco.de>

Hi,

thanks for the update.

Am 05.12.25 um 18:24 schrieb René Rebe:
> Unlike the original, deleted Matrox mga driver, the new mgag200 driver
> has the XRGB frame-buffer byte swapped on big-endian "RISC"
> systems. Fix by enabling byte swapping "PowerPC" OPMODE for any
> __BIG_ENDIAN config.
>
> Fixes: 414c45310625 ("mgag200: initial g200se driver (v2)")
> Signed-off-by: René Rebe <rene@exactco.de>
> Cc: stable@kernel.org
> ---
> V2: move to atomic_update
> Tested on IBM 43p Model 150 (7043-150) running T2/Linux.
> ---
>   drivers/gpu/drm/mgag200/mgag200_mode.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
> index 951d715dea30..d40434ec68ab 100644
> --- a/drivers/gpu/drm/mgag200/mgag200_mode.c
> +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
> @@ -496,6 +496,20 @@ void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane,
>   	struct drm_atomic_helper_damage_iter iter;
>   	struct drm_rect damage;
>   
> +#ifdef __BIG_ENDIAN
> +	/* Big-endian byte-swapping */
> +	switch (fb->format->format) {
> +	case DRM_FORMAT_RGB565:
> +		WREG32(MGAREG_OPMODE, 0x10100);
> +		break;
> +	case DRM_FORMAT_XRGB8888:
> +		WREG32(MGAREG_OPMODE, 0x20200);
> +		break;
> +	default:
> +		break;

No need for a default branch IIRC.

> +	}

This is the right place to set up the write mode.

But looking at the G200 docs, I found that the reset value for OPMODE 
has bit 18 set to 1. These writes clear the value. If that intentional?

For better style and compatibility, I suggest to first read the value 
and keep the reserved bit as-is.

u32 opmode

opmode = RREG32(MGAREG_OPMODE)
opmode &= ~GENMASK(17, 16)
opmode &= ~GENMASK(9, 8)
opmode &= ~GENMASK(3, 2)

switch (format) {
         opmode |= ...;
}

WREG32(OPMODE, opmode);

You can put that in a helper near set_startadd [1]

void mgag200_set_datasiz(struct mga_device *mdev, u32 format)
{
#if __BIG_ENDIAN
...
#endif
}

Then call that from atomic_update and it should be fine.

[1] 
https://elixir.bootlin.com/linux/v6.18/source/drivers/gpu/drm/mgag200/mgag200_mode.c#L117

Best regards
Thomas


> +#endif
> +
>   	drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
>   	drm_atomic_for_each_plane_damage(&iter, &damage) {
>   		mgag200_handle_damage(mdev, shadow_plane_state->data, fb, &damage);

-- 
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)



  reply	other threads:[~2025-12-08  8:30 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-05 17:24 René Rebe
2025-12-08  8:29 ` Thomas Zimmermann [this message]
2025-12-08 12:39   ` René Rebe

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