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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
	Rob Herring	 <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley	 <conor+dt@kernel.org>,
	Iwona Winiarska <iwona.winiarska@intel.com>,
	Guenter Roeck <linux@roeck-us.net>
Cc: openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	 devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v2 2/6] peci: controller: Add StarFive JHB100 PECI driver
Date: Mon, 28 Sep 2026 10:12:56 +0200	[thread overview]
Message-ID: <838cc8f7099bfc5ee1cac9d3aca7a87aa7dfd17d.camel@pengutronix.de> (raw)
In-Reply-To: <20260928075956.62298-3-changhuang.liang@starfivetech.com>

On Mo, 2026-09-28 at 00:59 -0700, Changhuang Liang wrote:
> Add PECI controller driver for StarFive JHB100 SoC. The driver supports
> PECI protocol communication for CPU thermal management.
> 
> For this controller, the special clock and reset operation sequence is:
>   probe: clk_prepare_enable() then reset_control_deassert()
>   remove: clk_disable_unprepare() then reset_control_assert()
> 
> Co-developed-by: Mason Huo <mason.huo@starfivetech.com>
> Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
> ---
>  MAINTAINERS                             |   8 +
>  drivers/peci/controller/Kconfig         |  17 ++
>  drivers/peci/controller/Makefile        |   1 +
>  drivers/peci/controller/peci-starfive.c | 376 ++++++++++++++++++++++++
>  4 files changed, 402 insertions(+)
>  create mode 100644 drivers/peci/controller/peci-starfive.c
> 
[...]
> diff --git a/drivers/peci/controller/peci-starfive.c b/drivers/peci/controller/peci-starfive.c
> new file mode 100644
> index 000000000000..6004cb27a774
> --- /dev/null
> +++ b/drivers/peci/controller/peci-starfive.c
> @@ -0,0 +1,376 @@
[...]
> +static int starfive_peci_init_clk_rst(struct starfive_peci *priv)
> +{
> +	int ret;
> +
> +	priv->clk = devm_clk_get(priv->dev, NULL);
> +	if (IS_ERR(priv->clk))
> +		return dev_err_probe(priv->dev, PTR_ERR(priv->clk),
> +				     "Failed to get peci clock\n");
> +
> +	priv->rst = devm_reset_control_get(priv->dev, NULL);

Please use devm_reset_control_get_exclusive() directly.

> +	if (IS_ERR(priv->rst))
> +		return dev_err_probe(priv->dev, PTR_ERR(priv->rst),
> +				     "Failed to get reset control\n");
> +
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret)
> +		return dev_err_probe(priv->dev, ret,
> +				     "Failed to enable peci clock\n");
> +
> +	ret = reset_control_deassert(priv->rst);
> +	if (ret) {
> +		clk_disable_unprepare(priv->clk);
> +		return dev_err_probe(priv->dev, ret,
> +				     "Failed to deassert reset control\n");
> +	}
> +
> +	return devm_add_action_or_reset(priv->dev, starfive_peci_clk_reset_release,
> +					priv);

This could be simplified with devm_clk_get_enabled() and
devm_reset_control_get_exclusive_deasserted().

regards
Philipp

  reply	other threads:[~2026-09-28  8:12 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-28  7:59 [PATCH v2 0/6] Add StarFive JHB100 PECI support Changhuang Liang
2026-09-28  7:59 ` [PATCH v2 1/6] dt-bindings: peci: Add StarFive JHB100 PECI controller Changhuang Liang
2026-09-28  7:59 ` [PATCH v2 2/6] peci: controller: Add StarFive JHB100 PECI driver Changhuang Liang
2026-09-28  8:12   ` Philipp Zabel [this message]
2026-09-28  8:21     ` Changhuang Liang
2026-09-28  7:59 ` [PATCH v2 3/6] peci: Add support for PECI CC 0x83 retry condition Changhuang Liang
2026-09-28  7:59 ` [PATCH v2 4/6] peci: cpu: Add Intel Granite Rapids support Changhuang Liang
2026-09-28  7:59 ` [PATCH v2 5/6] hwmon: (peci/cputemp) Add support for Granite Rapids (GNR) Changhuang Liang
2026-09-28  7:59 ` [PATCH v2 6/6] hwmon: (peci/dimmtemp) " Changhuang Liang

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