From: Sricharan R <sricharan@codeaurora.org>
To: Andy Gross <andy.gross@linaro.org>
Cc: Varadarajan Narayanan <varada@codeaurora.org>,
broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
david.brown@linaro.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org
Subject: Re: [PATCH 07/18] spi: qup: Fix transaction done signaling
Date: Thu, 15 Jun 2017 10:44:43 +0530 [thread overview]
Message-ID: <83e60e35-747f-4427-b77c-5dda653432ae@codeaurora.org> (raw)
In-Reply-To: <20170614195155.GB32733@hector.wework.com>
Hi Andy,
On 6/15/2017 1:21 AM, Andy Gross wrote:
> On Wed, Jun 14, 2017 at 12:43:43PM +0530, Sricharan R wrote:
>> Hi Varada,
>>
>> On 6/14/2017 11:22 AM, Varadarajan Narayanan wrote:
>>> Wait to signal done until we get all of the interrupts we are expecting
>>> to get for a transaction. If we don't wait for the input done flag, we
>>> can be inbetween transactions when the done flag comes in and this can
>>> mess up the next transaction.
>>>
>>> Signed-off-by: Andy Gross <andy.gross@linaro.org>
>>> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
>>> ---
>>> drivers/spi/spi-qup.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
>>> index 2124815..7c22ee4 100644
>>> --- a/drivers/spi/spi-qup.c
>>> +++ b/drivers/spi/spi-qup.c
>>> @@ -465,7 +465,8 @@ static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
>>> controller->xfer = xfer;
>>> spin_unlock_irqrestore(&controller->lock, flags);
>>>
>>> - if (controller->rx_bytes == xfer->len || error)
>>> + if ((controller->rx_bytes == xfer->len &&
>>> + (opflags & QUP_OP_MAX_INPUT_DONE_FLAG)) || error)
>>
>> Not sure why we need this additional check, because having read all the
>> bytes implies transfer complete (or) why not just check only for
>> QUP_OP_MAX_INPUT_DONE_FLAG ?
>
> So you can receive an interrupt for the last data without it having also
> signalled the INPUT_DONE. That means you'd have one more IRQ come in and if you
> don't wait for that, you could start up the next transaction and have an irq
> come in that screws up that transaction.
>
> It might be sufficient to just wait for the INPUT_DONE_FLAG. That cannot be
> signalled unless the rx_bytes == xfer->len.
>
Right, that should simply it little bit.
Regards,
Sricharan
--
"QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2017-06-15 5:14 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-14 5:52 [PATCH 00/18] spi: qup: Fixes and add support for >64k transfers Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 01/18] spi: qup: Enable chip select support Varadarajan Narayanan
2017-06-14 9:47 ` Stanimir Varbanov
2017-08-08 11:18 ` Applied "spi: qup: Enable chip select support" to the spi tree Mark Brown
2017-06-14 5:52 ` [PATCH 02/18] spi: qup: Setup DMA mode correctly Varadarajan Narayanan
2017-08-08 11:18 ` Applied "spi: qup: Setup DMA mode correctly" to the spi tree Mark Brown
2017-06-14 5:52 ` [PATCH 03/18] spi: qup: Add completion timeout for dma mode Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 04/18] spi: qup: Add completion timeout for fifo/block mode Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 05/18] spi: qup: Place the QUP in run mode before DMA transactions Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 06/18] spi: qup: Fix error handling in spi_qup_prep_sg Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 07/18] spi: qup: Fix transaction done signaling Varadarajan Narayanan
2017-06-14 7:13 ` Sricharan R
2017-06-14 19:51 ` Andy Gross
2017-06-15 5:14 ` Sricharan R [this message]
2017-06-14 5:52 ` [PATCH 08/18] spi: qup: Handle v1 dma completion differently Varadarajan Narayanan
2017-06-14 7:15 ` Sricharan R
2017-06-14 19:53 ` Andy Gross
2017-06-14 5:52 ` [PATCH 09/18] spi: qup: Do block sized read/write in block mode Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 10/18] spi: qup: Fix DMA mode interrupt handling Varadarajan Narayanan
2017-06-14 7:21 ` Sricharan R
2017-06-14 20:06 ` Andy Gross
2017-06-15 5:52 ` Sricharan R
2017-06-14 5:52 ` [PATCH 11/18] spi: qup: properly detect extra interrupts Varadarajan Narayanan
2017-06-14 7:27 ` Sricharan R
2017-06-14 19:59 ` Andy Gross
2017-06-14 21:51 ` Matthew McClintock
2017-06-15 5:27 ` Sricharan R
2017-06-14 5:52 ` [PATCH 12/18] spi: qup: refactor spi_qup_io_config into two functions Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 13/18] spi: qup: call io_config in mode specific function Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 14/18] spi: qup: allow block mode to generate multiple transactions Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 15/18] spi: qup: refactor spi_qup_prep_sg Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 16/18] spi: qup: allow multiple DMA transactions per spi xfer Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 17/18] spi: qup: Ensure done detection Varadarajan Narayanan
2017-06-14 5:52 ` [PATCH 18/18] spi: qup: support for qup v1 dma Varadarajan Narayanan
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