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* [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp
@ 2022-10-04 20:24 Frank Li
  2022-10-04 21:27 ` Fabio Estevam
  2022-10-04 22:45 ` [irqchip: irq/irqchip-fixes] irqchip/imx-mu-msi: Fix " irqchip-bot for Frank Li
  0 siblings, 2 replies; 4+ messages in thread
From: Frank Li @ 2022-10-04 20:24 UTC (permalink / raw)
  To: imx, Thomas Gleixner, Marc Zyngier, Shawn Guo, Sascha Hauer,
	Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	open list:IRQCHIP DRIVERS,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE

Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/irqchip/irq-imx-mu-msi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139dc36e82..229039eda1b1f 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
 	.xSR    = {
 			[IMX_MU_SR]  = 0xC,
 			[IMX_MU_GSR] = 0x118,
-			[IMX_MU_GSR] = 0x124,
+			[IMX_MU_TSR] = 0x124,
 			[IMX_MU_RSR] = 0x12C,
 		  },
 	.xCR    = {
-- 
2.35.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp
  2022-10-04 20:24 [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp Frank Li
@ 2022-10-04 21:27 ` Fabio Estevam
  2022-10-04 22:41   ` Marc Zyngier
  2022-10-04 22:45 ` [irqchip: irq/irqchip-fixes] irqchip/imx-mu-msi: Fix " irqchip-bot for Frank Li
  1 sibling, 1 reply; 4+ messages in thread
From: Fabio Estevam @ 2022-10-04 21:27 UTC (permalink / raw)
  To: Frank Li
  Cc: imx, Thomas Gleixner, Marc Zyngier, Shawn Guo, Sascha Hauer,
	Pengutronix Kernel Team, NXP Linux Team,
	open list:IRQCHIP DRIVERS,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	colin.i.king

Hi Frank,

On Tue, Oct 4, 2022 at 5:24 PM Frank Li <Frank.Li@nxp.com> wrote:
>
> Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>

You missed passing Reported-by and Fixes tag.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp
  2022-10-04 21:27 ` Fabio Estevam
@ 2022-10-04 22:41   ` Marc Zyngier
  0 siblings, 0 replies; 4+ messages in thread
From: Marc Zyngier @ 2022-10-04 22:41 UTC (permalink / raw)
  To: Fabio Estevam
  Cc: Frank Li, imx, Thomas Gleixner, Shawn Guo, Sascha Hauer,
	Pengutronix Kernel Team, NXP Linux Team,
	open list:IRQCHIP DRIVERS,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	colin.i.king

On Tue, 04 Oct 2022 22:27:32 +0100,
Fabio Estevam <festevam@gmail.com> wrote:
> 
> Hi Frank,
> 
> On Tue, Oct 4, 2022 at 5:24 PM Frank Li <Frank.Li@nxp.com> wrote:
> >
> > Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> 
> You missed passing Reported-by and Fixes tag.

I fixed that locally. Thanks for CC'ing Colin though.

	M.

-- 
Without deviation from the norm, progress is not possible.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [irqchip: irq/irqchip-fixes] irqchip/imx-mu-msi: Fix wrong register offset for 8ulp
  2022-10-04 20:24 [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp Frank Li
  2022-10-04 21:27 ` Fabio Estevam
@ 2022-10-04 22:45 ` irqchip-bot for Frank Li
  1 sibling, 0 replies; 4+ messages in thread
From: irqchip-bot for Frank Li @ 2022-10-04 22:45 UTC (permalink / raw)
  To: linux-kernel; +Cc: Colin King, Frank Li, Marc Zyngier, tglx

The following commit has been merged into the irq/irqchip-fixes branch of irqchip:

Commit-ID:     e4a7e67a08ac409f1485c82a2190636d5c81b932
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/e4a7e67a08ac409f1485c82a2190636d5c81b932
Author:        Frank Li <Frank.Li@nxp.com>
AuthorDate:    Tue, 04 Oct 2022 15:24:14 -05:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Tue, 04 Oct 2022 23:35:36 +01:00

irqchip/imx-mu-msi: Fix wrong register offset for 8ulp

Offset 0x124 should be for IMX_MU_TSR, not IMX_MU_GSR.

Fixes: 70afdab904d2 ("irqchip: Add IMX MU MSI controller driver")
Reported-by: Colin King <colin.i.king@gmail.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
[maz: updated commit message, tags]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221004202414.216577-1-Frank.Li@nxp.com
---
 drivers/irqchip/irq-imx-mu-msi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139d..229039e 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
 	.xSR    = {
 			[IMX_MU_SR]  = 0xC,
 			[IMX_MU_GSR] = 0x118,
-			[IMX_MU_GSR] = 0x124,
+			[IMX_MU_TSR] = 0x124,
 			[IMX_MU_RSR] = 0x12C,
 		  },
 	.xCR    = {

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-10-04 22:45 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-04 20:24 [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp Frank Li
2022-10-04 21:27 ` Fabio Estevam
2022-10-04 22:41   ` Marc Zyngier
2022-10-04 22:45 ` [irqchip: irq/irqchip-fixes] irqchip/imx-mu-msi: Fix " irqchip-bot for Frank Li

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