From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: "guanghuifeng@linux.alibaba.com" <guanghuifeng@linux.alibaba.com>,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, jgg@nvidia.com
Cc: yi.l.liu@intel.com, kevin.tian@intel.com, nicolinc@nvidia.com,
vasant.hegde@amd.com, jon.grimm@amd.com, santosh.shukla@amd.com,
Sairaj.K@amd.com, jay.chen@amd.com, Ming.Shu@amd.com,
SooJin.Tan@amd.com, wvw@google.com, wnliu@google.com,
dantuluris@google.com, chriscli@google.com, kpsingh@google.com,
alejandro.j.jimenez@oracle.com, joao.m.martins@oracle.com
Subject: Re: [PATCH v5 08/24] iommu/amd: Introduce Reset vMMIO Command
Date: Mon, 21 Sep 2026 16:10:49 +0700 [thread overview]
Message-ID: <8671fbb9-70a5-44df-b89c-c6dcf9f0e78d@amd.com> (raw)
In-Reply-To: <d1f568a0-a273-4e4b-853d-5c826b2af50c@linux.alibaba.com>
On 9/19/2026 10:11 PM, guanghuifeng@linux.alibaba.com wrote:
>
>
> 在 2026/9/15 2:47, Suravee Suthikulpanit 写道:
>> Introduce new IOMMU commands for vIOMMU to reset
>> virtualized MMIO registers of a particular guest.
>>
>> Always program RESET_MMIO_ALL_FLAG and RESET_MMIO_VCMD_FLAG.
>> Propagate iommu_completion_wait() errors to the caller.
>>
>> Reviewed-by: Weinan Liu <wnliu@google.com>
>> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>> ---
>> drivers/iommu/amd/amd_iommu.h | 1 +
>> drivers/iommu/amd/amd_iommu_types.h | 3 +++
>> drivers/iommu/amd/iommu.c | 21 +++++++++++++++++++++
>> drivers/iommu/amd/iommufd.c | 5 +++++
>> 4 files changed, 30 insertions(+)
>>
>> diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/
>> amd_iommu.h
>> index 51e4364e8564..8c298e090889 100644
>> --- a/drivers/iommu/amd/amd_iommu.h
>> +++ b/drivers/iommu/amd/amd_iommu.h
>> @@ -233,4 +233,5 @@ amd_iommu_alloc_domain_nested(struct
>> iommufd_viommu *viommu, u32 flags,
>> /* Guest ID for vIOMMU */
>> int amd_iommu_gid_alloc(struct amd_iommu *iommu);
>> void amd_iommu_gid_free(struct amd_iommu *iommu, int gid);
>> +int amd_iommu_reset_vmmio(struct amd_iommu *iommu, u16 gid);
>> #endif /* AMD_IOMMU_H */
>> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/
>> amd_iommu_types.h
>> index 3aaaf69a1e7d..9eb9a0c190de 100644
>> --- a/drivers/iommu/amd/amd_iommu_types.h
>> +++ b/drivers/iommu/amd/amd_iommu_types.h
>> @@ -209,6 +209,9 @@
>> #define CMD_INV_IRT 0x05
>> #define CMD_COMPLETE_PPR 0x07
>> #define CMD_INV_ALL 0x08
>> +#define CMD_RESET_VMMIO 0x0A
>> +#define RESET_MMIO_ALL_FLAG BIT(28)
>
> RESET_MMIO_ALL_FLAG is defined at the wrong bit position?
>
> Per spec Section 2.4.10 (RESET_VMMIO Command), the data[0] dword layout is:
> Bit 31 : VCmd - Reset virtual command buffer for the specific Guest
> Bits 30:28 : Reserved
> Bit 27 : All (IAll) - Reset the whole virtual IOMMU for the specific
> Guest
> Bits 26:16 : Reserved
> Bits 15:0 : GuestID
>
> The "All" bit is at position 27, not 28. Bit 28 falls within the
> Reserved field (30:28).As currently coded, build_reset_vmmio() sets bit
> 28 (Reserved) and leaves bit 27 (All) clear. This means:
> The intended "reset the whole virtual IOMMU" semantics (including
> clearing VMVld in VF Control MMIO Offset 10h) is never actually triggered.
> Writing 1 to a Reserved bit has undefined behavior per the spec - it may
> be silently ignored or trigger an ILLEGAL_COMMAND_ERROR event depending
> on the implementation.
>
> -#define RESET_MMIO_ALL_FLAG BIT(28)
> +#define RESET_MMIO_ALL_FLAG BIT(27)
As I mentioned in the v4 here
(https://lore.kernel.org/linux-iommu/20260727132913.22475-1-suravee.suthikulpanit@amd.com/T/#m6d0d1670600e1217b6138fce7d936805326d9bb6),
there is a typo in the spec, which will be corrected in the next
revision. The correct position for ALL bit is 28.
Thanks,
Suravee.
next prev parent reply other threads:[~2026-09-21 9:11 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-14 18:47 [PATCH v5 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 01/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 02/24] iommu/amd: Introduce EVENT_TYPE_GUEST_EVENT_FAULT Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-09-19 15:11 ` guanghuifeng
2026-09-21 9:10 ` Suthikulpanit, Suravee [this message]
2026-09-14 18:47 ` [PATCH v5 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 11/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 12/24] iommu/amd: Store per-segment iommu_dev_data in an xarray Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 13/24] iommu/amd: Program IOMMU DTE with the private IPA domain Suravee Suthikulpanit
2026-09-19 15:26 ` guanghuifeng
2026-09-14 18:47 ` [PATCH v5 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 16/24] iommu/amd: Add IOMMUFD vDevice and DevID mapping Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 17/24] iommu/amd: Program nested DTE and DomID map on attach Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 18/24] iommu/amd: Init and clear vIOMMU DevID and DomID maps Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-09-14 18:47 ` [PATCH v5 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit
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