From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
To: Borislav Petkov <bp@alien8.de>
Cc: dinguyen@kernel.org, tony.luck@intel.com,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] EDAC/altera: Handle OCRAM ECC enable after warm reset
Date: Tue, 11 Nov 2025 15:13:14 +0800 [thread overview]
Message-ID: <868dbfce-fae7-4231-bd91-4924989d61bd@altera.com> (raw)
In-Reply-To: <20251109185717.GBaRDkDUVYCHa_M7aP@fat_crate.local>
On 10/11/2025 2:57 am, Borislav Petkov wrote:
> On Mon, Nov 03, 2025 at 10:09:20PM +0800, niravkumarlaxmidas.rabara@altera.com wrote:
>> From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
>>
>> The OCRAM ECC is always enabled either by the BootROM or by the Secure
>> Device Manager (SDM) during a power-on reset on SoCFPGA.
>>
>> However, during a warm reset, the OCRAM content is retained to preserve
>> data, while the control and status registers are reset to their default
>> values. As a result, ECC must be explicitly re-enabled after a warm reset.
>>
>> Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
>> ---
>> drivers/edac/altera_edac.c | 18 +++++++++++++++---
>> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> Does this need to go stable?
>
> Fixes: tag?
>
Yes, I missed it.
Will send v2 patch with the Fixes and CC tags.
Thanks,
Nirav
prev parent reply other threads:[~2025-11-11 7:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 14:09 niravkumarlaxmidas.rabara
2025-11-06 4:49 ` Dinh Nguyen
2025-11-09 18:57 ` Borislav Petkov
2025-11-11 7:13 ` Niravkumar L Rabara [this message]
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