Re: [PATCH v4 2/4] arm64: dts: mt8195: Add edptx and dptx nodes

[AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>]

Il 15/11/22 08:58, Rex-BC Chen (陳柏辰) ha scritto:
> On Fri, 2022-11-11 at 13:22 +0100, Matthias Brugger wrote:
>>
>> On 10/11/2022 07:37, Bo-Chen Chen wrote:
>>> In MT8195, we use edptx as the internal display interface and use
>>> dptx as the external display interface. Therefore, we need to add
>>> these nodes to support the internal display and the external
>>> display.
>>>
>>> - Add dp calibration data in the efuse node.
>>> - Add edptx and dptx nodes for MT8195.
>>>
>>> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
>>> Reviewed-by: AngeloGioacchino Del Regno <
>>> angelogioacchino.delregno@collabora.com>
>>> ---
>>>    arch/arm64/boot/dts/mediatek/mt8195.dtsi | 25
>>> ++++++++++++++++++++++++
>>>    1 file changed, 25 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>>> b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>>> index c380738d10cb..7acbef5a4517 100644
>>> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>>> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>>> @@ -1244,6 +1244,9 @@
>>>    				reg = <0x189 0x2>;
>>>    				bits = <7 5>;
>>>    			};
>>> +			dp_calibration: dp-data@1ac {
>>> +				reg = <0x1ac 0x10>;
>>> +			};
>>>    		};
>>>    
>>>    		u3phy2: t-phy@11c40000 {
>>> @@ -2205,5 +2208,27 @@
>>>    			clock-names = "engine", "pixel", "pll";
>>>    			status = "disabled";
>>>    		};
>>> +
>>> +		edp_tx: edp-tx@1c500000 {
>>> +			compatible = "mediatek,mt8195-edp-tx";
>>> +			reg = <0 0x1c500000 0 0x8000>;
>>> +			nvmem-cells = <&dp_calibration>;
>>> +			nvmem-cell-names = "dp_calibration_data";
>>> +			power-domains = <&spm
>>> MT8195_POWER_DOMAIN_EPD_TX>;
>>> +			interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH
>>> 0>;
>>> +			max-linkrate-mhz = <8100>;
>>> +			status = "disabled";
>>> +		};
>>> +
>>> +		dp_tx: dp-tx@1c600000 {
>>> +			compatible = "mediatek,mt8195-dp-tx";
>>> +			reg = <0 0x1c600000 0 0x8000>;
>>> +			nvmem-cells = <&dp_calibration>;
>>> +			nvmem-cell-names = "dp_calibration_data";
>>> +			power-domains = <&spm
>>> MT8195_POWER_DOMAIN_DP_TX>;
>>> +			interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH
>>> 0>;
>>> +			max-linkrate-mhz = <8100>;
>>> +			status = "disabled";
>>> +		};
>>
>> For some not really obvious reasons we get the following errors with
>> make CHECK_DTBS=1 mediatek/mt8195-cherry-tomato-r2.dtb
>>
>> arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dtb:0:0:
>> /soc/edp-tx@1c500000: failed to match any schema with compatible:
>> ['mediatek,mt8195-edp-tx']
>> arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dtb:0:0:
>> /soc/dp-tx@1c600000: failed to match any schema with compatible:
>> ['mediatek,mt8195-dp-tx']
>>
>> Can you please see how to fix this. Tested with next-20221111.
>>
>> Regards,
>> Matthias
>>
> 
> Hello Matthias,
> 
> I can not reproduce this issue in my local environment, but I am sure
> the binding is in kernel master branch (v6.1-rc5):
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml?h=v6.1-rc5
> 
> It's strange that the message you provided said it can not find any
> schema with ['mediatek,mt8195-edp-tx'] and ['mediatek,mt8195-dp-tx'].
> 

Matthias, I can't reproduce that either... perhaps there's something odd that's
going on with your environment?

Cheers