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From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>,
	linux-kernel@vger.kernel.org, Robert Richter <rric@kernel.org>,
	Frederic Weisbecker <fweisbec@gmail.com>,
	Mike Galbraith <efault@gmx.de>, Paul Mackerras <paulus@samba.org>,
	Stephane Eranian <eranian@google.com>,
	Andi Kleen <ak@linux.intel.com>,
	kan.liang@intel.com, adrian.hunter@intel.com, acme@infradead.org
Subject: Re: [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver
Date: Fri, 31 Oct 2014 15:13:35 +0200	[thread overview]
Message-ID: <8738a4crgg.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <20141022143241.GT12706@worktop.programming.kicks-ass.net>

Peter Zijlstra <peterz@infradead.org> writes:

> On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
>> +
>> +enum cpuid_regs {
>> +	CR_EAX = 0,
>> +	CR_ECX,
>> +	CR_EDX,
>> +	CR_EBX
>> +};
>> +
>> +/*
>> + * Capabilities of Intel PT hardware, such as number of address bits or
>> + * supported output schemes, are cached and exported to userspace as "caps"
>> + * attribute group of pt pmu device
>> + * (/sys/bus/event_source/devices/intel_pt/caps/) so that userspace can store
>> + * relevant bits together with intel_pt traces.
>> + */
>> +#define PT_CAP(_n, _l, _r, _m)						\
>> +	[PT_CAP_ ## _n] = { .name = __stringify(_n), .leaf = _l,	\
>> +			    .reg = _r, .mask = _m }
>> +
>> +static struct pt_cap_desc {
>> +	const char	*name;
>> +	u32		leaf;
>> +	u8		reg;
>> +	u32		mask;
>> +} pt_caps[] = {
>> +	PT_CAP(max_subleaf,		0, CR_EAX, 0xffffffff),
>> +	PT_CAP(cr3_filtering,		0, CR_EBX, BIT(0)),
>> +	PT_CAP(topa_output,		0, CR_ECX, BIT(0)),
>> +	PT_CAP(topa_multiple_entries,	0, CR_ECX, BIT(1)),
>> +	PT_CAP(payloads_lip,		0, CR_ECX, BIT(31)),
>> +};
>> +
>> +static u32 pt_cap_get(enum pt_capabilities cap)
>> +{
>> +	struct pt_cap_desc *cd = &pt_caps[cap];
>> +	u32 c = pt_pmu.caps[cd->leaf * 4 + cd->reg];
>> +	unsigned int shift = __ffs(cd->mask);
>> +
>> +	return (c & cd->mask) >> shift;
>> +}
>
>> +	if (test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT)) {
>> +		for (i = 0; i < PT_CPUID_LEAVES; i++)
>> +			cpuid_count(20, i,
>> +				    &pt_pmu.caps[CR_EAX + i * 4],
>> +				    &pt_pmu.caps[CR_EBX + i * 4],
>> +				    &pt_pmu.caps[CR_ECX + i * 4],
>> +				    &pt_pmu.caps[CR_EDX + i * 4]);
>> +	} else
>> +		return -ENODEV;
>
> I would really rather you use bitfield unions for cpuid stuff, have a
> look at union cpuid10_e[abd]x as used in
> perf_event_intel.c:intel_pmu_init().

It looks like it would only work for the first cpuid leaf, but we'll
need more than that. And the array makes it easier to allocate
attributes for sysfs en masse.

I guess it doesn't really matter if we use unions unless these bits need
to be exported to other parts of the kernel? But *that* is hardly a good
idea. What do you think?

Regards,
--
Alex

  reply	other threads:[~2014-10-31 13:13 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-13 13:45 [PATCH v5 00/20] perf: Add infrastructure and support for Intel PT Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 01/20] perf: Add data_{offset,size} to user_page Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 02/20] perf: Add AUX area to ring buffer for raw data streams Alexander Shishkin
2014-10-22 12:35   ` Peter Zijlstra
2014-10-23  3:05     ` Frederic Weisbecker
2014-10-13 13:45 ` [PATCH v5 03/20] perf: Support high-order allocations for AUX space Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 04/20] perf: Add a capability for AUX_NO_SG pmus to do software double buffering Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 05/20] perf: Add a pmu capability for "exclusive" events Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 06/20] perf: Add AUX record Alexander Shishkin
2014-10-22 13:26   ` Peter Zijlstra
2014-10-22 14:18     ` Alexander Shishkin
2014-10-22 15:07       ` Peter Zijlstra
2014-10-13 13:45 ` [PATCH v5 07/20] perf: Add api for pmus to write to AUX area Alexander Shishkin
2014-10-22 14:02   ` Peter Zijlstra
2014-10-22 14:14     ` Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 08/20] perf: Support overwrite mode for " Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 09/20] perf: Add wakeup watermark control to " Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 10/20] x86: Add Intel Processor Trace (INTEL_PT) cpu feature detection Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 11/20] x86: perf: Intel PT and LBR/BTS are mutually exclusive Alexander Shishkin
2014-10-22 14:15   ` Peter Zijlstra
2014-10-24  7:47     ` Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver Alexander Shishkin
2014-10-22 14:17   ` Peter Zijlstra
2014-10-22 14:20   ` Peter Zijlstra
2014-10-24  7:49     ` Alexander Shishkin
2014-10-24 11:26       ` Peter Zijlstra
2014-10-24 12:01         ` Alexander Shishkin
2014-10-22 14:23   ` Peter Zijlstra
2014-10-22 14:27   ` Peter Zijlstra
2014-10-24  7:50     ` Alexander Shishkin
2014-10-22 14:32   ` Peter Zijlstra
2014-10-31 13:13     ` Alexander Shishkin [this message]
2014-11-04 15:57       ` Peter Zijlstra
2014-11-11 11:24         ` Alexander Shishkin
2014-11-11 13:20           ` Peter Zijlstra
2014-11-11 14:17             ` Alexander Shishkin
2014-10-22 14:34   ` Peter Zijlstra
2014-10-24  7:52     ` Alexander Shishkin
2014-10-22 14:45   ` Peter Zijlstra
2014-10-24  8:22     ` Alexander Shishkin
2014-10-24 11:51       ` Peter Zijlstra
2014-10-24 12:13         ` Alexander Shishkin
2014-10-24 13:02           ` Peter Zijlstra
2014-10-24 13:18             ` Alexander Shishkin
2014-10-24 13:48               ` Peter Zijlstra
2014-10-22 14:49   ` Peter Zijlstra
2014-10-22 15:11     ` Peter Zijlstra
2014-10-22 14:55   ` Peter Zijlstra
2014-10-24  7:59     ` Alexander Shishkin
2014-10-22 15:14   ` Peter Zijlstra
2014-10-24  7:59     ` Alexander Shishkin
2014-10-22 15:26   ` Peter Zijlstra
2014-10-13 13:45 ` [PATCH v5 13/20] x86: perf: intel_bts: Add BTS " Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 14/20] perf: add ITRACE_START record to indicate that tracing has started Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 15/20] perf: Add api to (de-)allocate AUX buffers for kernel counters Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 16/20] perf: Add a helper for looking up pmus by type Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 17/20] perf: Add infrastructure for using AUX data in perf samples Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 18/20] perf: Allocate ring buffers for inherited per-task kernel events Alexander Shishkin
2014-10-23 12:38   ` Peter Zijlstra
2014-10-24  7:44     ` Alexander Shishkin
2014-10-30  8:43       ` Peter Zijlstra
2014-10-30 10:20         ` Alexander Shishkin
2014-10-30 13:31         ` Arnaldo Carvalho de Melo
2014-10-13 13:45 ` [PATCH v5 19/20] perf: Allow AUX sampling for multiple events Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 20/20] perf: Allow AUX sampling of inherited events Alexander Shishkin

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