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From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: Frank Li <Frank.li@nxp.com>
Cc: mbrugger@suse.com, chester62515@gmail.com,
	ghennadi.procopciuc@oss.nxp.com, shawnguo@kernel.org,
	s.hauer@pengutronix.de, s32@nxp.com, kernel@pengutronix.de,
	festevam@gmail.com, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
	imx@lists.linux.dev, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
	Thomas Fossati <thomas.fossati@linaro.org>
Subject: Re: [PATCH 2/8] arm64: dts: s32g274-rd2: Enable the STM timers
Date: Wed, 30 Jul 2025 23:15:54 +0200	[thread overview]
Message-ID: <87d40626-8789-4e71-8ac3-fa8fff0a7435@linaro.org> (raw)
In-Reply-To: <aIp+4mWS1k73Vf/A@lizhi-Precision-Tower-5810>

On 30/07/2025 22:21, Frank Li wrote:
> On Wed, Jul 30, 2025 at 09:50:15PM +0200, Daniel Lezcano wrote:
>> Enable the timers STM0 -> STM3 on the s32g274-rd2
>>
>> The platform has 4 CPUs and the Linux STM timer driver is per
>> CPU. Enable 4 timers which will be used, other timers are useless for
>> the Linux kernel and there is no benefit to enable them.
> 
> S32 have not ARM local timer? It is quite strange!

I'm not saying there is no architected timers but there are the STM. May 
be I can reword the sentence to prevent this ambiguity.

>> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
>> Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
>> Cc: Thomas Fossati <thomas.fossati@linaro.org>
>> ---
>>   arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++
>>   1 file changed, 16 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
>> index b5ba51696f43..505776d19151 100644
>> --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
>> +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
>> @@ -40,6 +40,22 @@ &uart1 {
>>   	status = "okay";
>>   };
>>
>> +&stm0 {
>> +	status = "okay";
>> +};
>> +
>> +&stm1 {
>> +	status = "okay";
>> +};
>> +
>> +&stm2 {
>> +	status = "okay";
>> +};
>> +
>> +&stm3 {
>> +	status = "okay";
>> +};
>> +
>>   &usdhc0 {
>>   	pinctrl-names = "default", "state_100mhz", "state_200mhz";
>>   	pinctrl-0 = <&pinctrl_usdhc0>;
>> --
>> 2.43.0
>>


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  reply	other threads:[~2025-07-30 21:15 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-30 19:50 [PATCH 0/8] Add the STM and the SWT descriptions for the s32g2 and s32g3 Daniel Lezcano
2025-07-30 19:50 ` [PATCH 1/8] arm64: dts: s32g2: Add the STM description Daniel Lezcano
2025-07-30 20:19   ` Frank Li
2025-07-30 21:15     ` Daniel Lezcano
2025-07-31 23:20       ` Frank Li
2025-08-01  8:35         ` Daniel Lezcano
2025-07-30 19:50 ` [PATCH 2/8] arm64: dts: s32g274-rd2: Enable the STM timers Daniel Lezcano
2025-07-30 20:21   ` Frank Li
2025-07-30 21:15     ` Daniel Lezcano [this message]
2025-07-31 23:17       ` Frank Li
2025-08-01  8:23         ` Daniel Lezcano
2025-07-30 19:50 ` [PATCH 3/8] arm64: dts: s32g3: Add the STM descriptions Daniel Lezcano
2025-07-30 19:50 ` [PATCH 4/8] arm64: dts: s32g399a-rdb3: Enable the STM timers Daniel Lezcano
2025-07-30 19:50 ` [PATCH 5/8] arm64: dts: s32g2: Add the Software Timer Watchdog (SWT) description Daniel Lezcano
2025-07-30 20:23   ` Frank Li
2025-07-30 19:50 ` [PATCH 6/8] arm64: dts: s32g274-rd2: Enable the SWT watchdog Daniel Lezcano
2025-07-30 19:50 ` [PATCH 7/8] arm64: dts: s32g3: Add the Software Timer Watchdog (SWT) description Daniel Lezcano
2025-07-30 19:50 ` [PATCH 8/8] arm64: dts: s32g399a-rdb3: Enable the SWT watchdog Daniel Lezcano

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