[PATCH] x86/apic: Remove dead disable_esr machinery

[PATCH] x86/apic: Remove dead disable_esr machinery

[Daniil Tatianin]

From: Daniil Tatianin <99danilt@gmail.com>

apic::disable_esr was a quirk for the 32-bit NUMA-Q, Summit, ES7000 and
bigsmp platforms, which left the local APIC error status register alone
because "something untraceable" produced bad interrupts on those
machines. NUMA-Q, Summit and ES7000 went away in 2014 with commit
b5660ba76b41 ("x86, platforms: Remove NUMAQ"), commit 7cf6c94591bb
("x86, apic: Remove support for IBM Summit/EXA chipset") and commit
58f5d2d44883 ("x86, apic: Remove support for ia32-based Unisys ES7000"),
and the last setter went with commit 0abf508675c0 ("x86/smp: Drop
32-bit "bigsmp" machine support"). Every remaining APIC driver
initializes the flag to zero.

Remove the flag, the ESR setup bypass keyed on it and the 32-bit only
ESR clearing hammer in setup_local_APIC(), which was gated on the same
flag and therefore equally dead.

No functional changes.

Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru>
---
 arch/x86/include/asm/apic.h           |  3 +--
 arch/x86/kernel/apic/apic.c           | 20 --------------------
 arch/x86/kernel/apic/apic_flat_64.c   |  2 --
 arch/x86/kernel/apic/apic_noop.c      |  2 --
 arch/x86/kernel/apic/apic_numachip.c  |  4 ----
 arch/x86/kernel/apic/probe_32.c       |  2 --
 arch/x86/kernel/apic/x2apic_cluster.c |  2 --
 arch/x86/kernel/apic/x2apic_phys.c    |  2 --
 arch/x86/kernel/apic/x2apic_savic.c   |  2 --
 arch/x86/kernel/apic/x2apic_uv_x.c    |  2 --
 arch/x86/xen/apic.c                   |  2 --
 11 files changed, 1 insertion(+), 42 deletions(-)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 9cd493d467d4..5025b8413799 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -285,8 +285,7 @@ struct apic {
 	void	(*send_IPI_all)(int vector);
 	void	(*send_IPI_self)(int vector);
 
-	u32	disable_esr		: 1,
-		dest_mode_logical	: 1,
+	u32	dest_mode_logical	: 1,
 		x2apic_set_max_apicid	: 1,
 		nmi_to_offline_cpu	: 1;
 
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 90025451ace2..2b2a3d2d166e 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1402,17 +1402,6 @@ static void lapic_setup_esr(void)
 		return;
 	}
 
-	if (apic->disable_esr) {
-		/*
-		 * Something untraceable is creating bad interrupts on
-		 * secondary quads ... for the moment, just leave the
-		 * ESR disabled - we can't do anything useful with the
-		 * errors anyway - mbligh
-		 */
-		pr_info("Leaving ESR disabled.\n");
-		return;
-	}
-
 	maxlvt = lapic_get_maxlvt();
 	if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */
 		apic_write(APIC_ESR, 0);
@@ -1527,15 +1516,6 @@ static void setup_local_APIC(void)
 	value &= ~APIC_SPIV_APIC_ENABLED;
 	apic_write(APIC_SPIV, value);
 
-#ifdef CONFIG_X86_32
-	/* Pound the ESR really hard over the head with a big hammer - mbligh */
-	if (lapic_is_integrated() && apic->disable_esr) {
-		apic_write(APIC_ESR, 0);
-		apic_write(APIC_ESR, 0);
-		apic_write(APIC_ESR, 0);
-		apic_write(APIC_ESR, 0);
-	}
-#endif
 	/*
 	 * Intel recommends to set DFR, LDR and TPR before enabling
 	 * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index e0308d8c4e6c..f65e82c6e750 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -37,8 +37,6 @@ static struct apic apic_physflat __ro_after_init = {
 
 	.dest_mode_logical		= false,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= 0xFE,
diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_noop.c
index 58abb941c45b..0661cb008459 100644
--- a/arch/x86/kernel/apic/apic_noop.c
+++ b/arch/x86/kernel/apic/apic_noop.c
@@ -54,8 +54,6 @@ struct apic apic_noop __ro_after_init = {
 
 	.dest_mode_logical		= true,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= 0xFE,
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index a60c8960bbfd..27a9a5b33f63 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -210,8 +210,6 @@ static const struct apic apic_numachip1 __refconst = {
 
 	.dest_mode_logical		= false,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= UINT_MAX,
@@ -244,8 +242,6 @@ static const struct apic apic_numachip2 __refconst = {
 
 	.dest_mode_logical		= false,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= UINT_MAX,
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 87bc9e7ca5d6..00ee033ede14 100644
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -41,8 +41,6 @@ static struct apic apic_default __ro_after_init = {
 
 	.dest_mode_logical		= true,
 
-	.disable_esr			= 0,
-
 	.init_apic_ldr			= default_init_apic_ldr,
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 7db83212effb..0c8257cfa3fa 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -232,8 +232,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
 
 	.dest_mode_logical		= true,
 
-	.disable_esr			= 0,
-
 	.init_apic_ldr			= init_x2apic_ldr,
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 090647cc5a78..653ef67b42eb 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -129,8 +129,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
 
 	.dest_mode_logical		= false,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= UINT_MAX,
diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c
index 4bc6d7e018a5..f116dc7ecb01 100644
--- a/arch/x86/kernel/apic/x2apic_savic.c
+++ b/arch/x86/kernel/apic/x2apic_savic.c
@@ -394,8 +394,6 @@ static struct apic apic_x2apic_savic __ro_after_init = {
 
 	.dest_mode_logical		= false,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= UINT_MAX,
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 42568ceec481..bc8709893676 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -758,8 +758,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
 
 	.dest_mode_logical		= false,
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 	.max_apic_id			= UINT_MAX,
diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c
index bb0f3f368446..23db95dd3411 100644
--- a/arch/x86/xen/apic.c
+++ b/arch/x86/xen/apic.c
@@ -117,8 +117,6 @@ static struct apic xen_pv_apic __ro_after_init = {
 
 	/* .delivery_mode and .dest_mode_logical not used by XENPV */
 
-	.disable_esr			= 0,
-
 	.cpu_present_to_apicid		= xen_cpu_present_to_apicid,
 
 	.max_apic_id			= UINT_MAX,
-- 
2.53.0

Re: [PATCH] x86/apic: Remove dead disable_esr machinery

[Jürgen Groß]

[-- Attachment #1.1.1: Type: text/plain, Size: 1117 bytes --]

On 03.09.26 00:01, Daniil Tatianin wrote:
> From: Daniil Tatianin <99danilt@gmail.com>
> 
> apic::disable_esr was a quirk for the 32-bit NUMA-Q, Summit, ES7000 and
> bigsmp platforms, which left the local APIC error status register alone
> because "something untraceable" produced bad interrupts on those
> machines. NUMA-Q, Summit and ES7000 went away in 2014 with commit
> b5660ba76b41 ("x86, platforms: Remove NUMAQ"), commit 7cf6c94591bb
> ("x86, apic: Remove support for IBM Summit/EXA chipset") and commit
> 58f5d2d44883 ("x86, apic: Remove support for ia32-based Unisys ES7000"),
> and the last setter went with commit 0abf508675c0 ("x86/smp: Drop
> 32-bit "bigsmp" machine support"). Every remaining APIC driver
> initializes the flag to zero.
> 
> Remove the flag, the ESR setup bypass keyed on it and the 32-bit only
> ESR clearing hammer in setup_local_APIC(), which was gated on the same
> flag and therefore equally dead.
> 
> No functional changes.
> 
> Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru>

Acked-by: Juergen Gross <jgross@suse.com> # Xen part


Juergen

[-- Attachment #1.1.2: OpenPGP public key --]
[-- Type: application/pgp-keys, Size: 3743 bytes --]

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 495 bytes --]

Re: [PATCH] x86/apic: Remove dead disable_esr machinery

[Steve Wahl]

On Thu, Sep 03, 2026 at 01:01:23AM +0300, Daniil Tatianin wrote:
> From: Daniil Tatianin <99danilt@gmail.com>
> 
> apic::disable_esr was a quirk for the 32-bit NUMA-Q, Summit, ES7000 and
> bigsmp platforms, which left the local APIC error status register alone
> because "something untraceable" produced bad interrupts on those
> machines. NUMA-Q, Summit and ES7000 went away in 2014 with commit
> b5660ba76b41 ("x86, platforms: Remove NUMAQ"), commit 7cf6c94591bb
> ("x86, apic: Remove support for IBM Summit/EXA chipset") and commit
> 58f5d2d44883 ("x86, apic: Remove support for ia32-based Unisys ES7000"),
> and the last setter went with commit 0abf508675c0 ("x86/smp: Drop
> 32-bit "bigsmp" machine support"). Every remaining APIC driver
> initializes the flag to zero.
> 
> Remove the flag, the ESR setup bypass keyed on it and the 32-bit only
> ESR clearing hammer in setup_local_APIC(), which was gated on the same
> flag and therefore equally dead.
> 
> No functional changes.
> 
> Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru>

Acked-by: Steve Wahl <steve.wahl@hpe.com>


-- 
Steve Wahl, Hewlett Packard Enterprise

Re: [PATCH] x86/apic: Remove dead disable_esr machinery

[Thomas Gleixner]

On Thu, Sep 03 2026 at 01:01, Daniil Tatianin wrote:

> From: Daniil Tatianin <99danilt@gmail.com>
...
> Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru>

Seems you can't decide which of your alter egos is author and signing
off on the patch.

Re: [PATCH] x86/apic: Remove dead disable_esr machinery

[Daniil Tatianin]

On 9/3/26 11:20 PM, Thomas Gleixner wrote:
> On Thu, Sep 03 2026 at 01:01, Daniil Tatianin wrote:
>
>> From: Daniil Tatianin <99danilt@gmail.com>
> ...
>> Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru>
> Seems you can't decide which of your alter egos is author and signing
> off on the patch.

Yeah, sorry about that. Originally had my git email configured 
incorrectly. The right one is in the S-o-b (the one I sent the patch from).