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From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "regressions@leemhuis.info" <regressions@leemhuis.info>,
	"simona@ffwll.ch" <simona@ffwll.ch>,
	"me@adamthiede.com" <me@adamthiede.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"bisson.gary@gmail.com" <bisson.gary@gmail.com>,
	"airlied@gmail.com" <airlied@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"stable@vger.kernel.org" <stable@vger.kernel.org>,
	"kernel@collabora.com" <kernel@collabora.com>
Subject: Re: [PATCH] drm/mediatek: mtk_dsi: Enable HS clock only at pre-enable
Date: Wed, 29 Jul 2026 05:44:51 +0000	[thread overview]
Message-ID: <89059c1a8853ff9f6488a41c8444420cd8fae01d.camel@mediatek.com> (raw)
In-Reply-To: <20260728153145.578404-1-angelogioacchino.delregno@collabora.com>

On Tue, 2026-07-28 at 17:31 +0200, AngeloGioacchino Del Regno wrote:
> Commit 76255024cadb ("drm/mediatek: mtk_dsi: enable hs clock
> during pre-enable") rightfully moves the HS clock enablement to
> before atomic_enable(), but it's moving it to mtk_dsi_poweron(),
> which is not only called in the .atomic_pre_enable() callback
> for the DRM bridge, but also in the MediaTek DRM's .ddp_start()
> callback, which happens way before the bridge ones.
> 
> The HS clock enablement should be done at just the right time,
> otherwise some bridge chips (or some Display Driver ICs) may
> not work correctly: this is seen at least with a Parade DSI to
> eDP bridge (PS8640) on the MT8173 Elm Chromebook.
> 
> This resolves a regression that was seen on the aforementioned
> machine, which was happening only after a suspend-resume cycle.

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> 
> Cc: <stable@vger.kernel.org> # 7.1.x
> Fixes: 76255024cadb ("drm/mediatek: mtk_dsi: enable hs clock during pre-enable")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---


      parent reply	other threads:[~2026-07-29  5:45 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-28 15:31 AngeloGioacchino Del Regno
2026-07-28 15:47 ` Adam Thiede
2026-07-29  5:44 ` CK Hu (胡俊光) [this message]

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