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From: Dave Jiang <dave.jiang@intel.com>
To: Li Ming <ming.li@zohomail.com>,
	dave@stgolabs.net, jonathan.cameron@huawei.com,
	alison.schofield@intel.com, vishal.l.verma@intel.com,
	ira.weiny@intel.com, dan.j.williams@intel.com
Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] cxl/acpi: Fix using extra xormaps for address translation
Date: Thu, 15 Jan 2026 09:12:39 -0700	[thread overview]
Message-ID: <8bda319a-967a-4f90-906c-438ac3719346@intel.com> (raw)
In-Reply-To: <20260115131648.620177-1-ming.li@zohomail.com>



On 1/15/26 6:16 AM, Li Ming wrote:
> CXL r3.1 Table 9-22 defines a fixed number of XOR maps for interleave
> arithmetic based on the number of interleave ways, as reflected by
> hbiw_to_nr_maps[].
> 
> The current implementation applies all XOR maps during address
> translation, but it should use the spec-defined number of XOR maps
> derived from the number of interleave ways.

Can you add what is the current impact without applying the fix pls?

DJ

> 
> Fixes: 3b2fedcd75e3 ("cxl: Restore XOR'd position bits during address translation")
> Signed-off-by: Li Ming <ming.li@zohomail.com>
> ---
>  drivers/cxl/acpi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index 77ac940e3013..5f84d01e7d39 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -61,7 +61,7 @@ u64 cxl_do_xormap_calc(struct cxl_cxims_data *cximsd, u64 addr, int hbiw)
>  	 * bits results in val==0, if odd the XOR result is val==1.
>  	 */
>  
> -	for (int i = 0; i < cximsd->nr_maps; i++) {
> +	for (int i = 0; i < nr_maps_to_apply; i++) {
>  		if (!cximsd->xormaps[i])
>  			continue;
>  		pos = __ffs(cximsd->xormaps[i]);


  reply	other threads:[~2026-01-15 16:12 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-15 13:16 Li Ming
2026-01-15 16:12 ` Dave Jiang [this message]
2026-01-15 17:56 ` Alison Schofield
2026-01-16  9:54   ` Li Ming

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