From: Liran Alon <liran.alon@oracle.com>
To: <arjan@linux.intel.com>
Cc: <jmattson@google.com>, <dwmw@amazon.co.uk>, <bp@alien8.de>,
<aliguori@amazon.com>, <thomas.lendacky@amd.com>,
<pbonzini@redhat.com>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>
Subject: Re: [PATCH 6/7] x86/svm: Set IBPB when running a different VCPU
Date: Tue, 9 Jan 2018 08:01:13 -0800 (PST) [thread overview]
Message-ID: <8c497050-e425-49ea-b07c-b86575b9c63e@default> (raw)
----- arjan@linux.intel.com wrote:
> >> I'm sorry I'm not familiar with your L0/L1/L2 terminology
> >> (maybe it's before coffee has had time to permeate the brain)
> >
> > These are standard terminology for guest levels:
> > L0 == hypervisor that runs on bare-metal
> > L1 == hypervisor that runs as L0 guest.
> > L2 == software that runs as L1 guest.
> > (We are talking about nested virtualization here)
>
> 1. I really really hope that the guests don't use IBRS but use
> retpoline. At least for Linux that is going to be the prefered
> approach.
>
> 2. For the CPU, there really is only "bare metal" vs "guest"; all
> guests are "guests" no matter how deeply nested. So for the language
> of privilege domains etc,
> nested guests equal their parent.
So in the scenario I mentioned above, would L1 use BTB/BHB entries inserted by L2?
To me it seems that it would if IBRS takes prediction-mode into consideration.
And therefore, we must issue IBPB when switching between L1 & L2.
Same as happen on nVMX when switching between vmcs01 & vmcs02.
-Liran
next reply other threads:[~2018-01-09 16:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-09 16:01 Liran Alon [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-01-09 15:33 Liran Alon
2018-01-09 15:56 ` Arjan van de Ven
2018-01-09 15:00 Liran Alon
2018-01-09 15:19 ` Arjan van de Ven
2018-01-09 16:17 ` Paolo Bonzini
2018-01-09 16:23 ` Arjan van de Ven
2018-01-09 16:49 ` Paolo Bonzini
2018-01-09 20:39 ` Konrad Rzeszutek Wilk
2018-01-09 20:47 ` Konrad Rzeszutek Wilk
2018-01-09 20:57 ` Jim Mattson
2018-01-09 21:11 ` Konrad Rzeszutek Wilk
2018-01-09 21:19 ` Jim Mattson
2018-01-09 21:42 ` Paolo Bonzini
2018-01-09 21:59 ` Jim Mattson
2018-01-09 21:56 ` Paolo Bonzini
2018-01-09 11:31 Liran Alon
2018-01-09 11:41 ` Paolo Bonzini
2018-01-09 14:30 ` Arjan van de Ven
2018-01-08 18:08 [PATCH 0/7] KVM: x86: expose CVE-2017-5715 ("Spectre variant 2") mitigations to guest Paolo Bonzini
2018-01-08 18:08 ` [PATCH 6/7] x86/svm: Set IBPB when running a different VCPU Paolo Bonzini
2018-01-08 20:00 ` Liran Alon
2018-01-09 11:07 ` Paolo Bonzini
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