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From: "Naveen N Rao (AMD)" <naveen@kernel.org>
To: <x86@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>, <linux-kernel@vger.kernel.org>,
	Nikunj A Dadhania <nikunj@amd.com>,
	Manali Shukla <manali.shukla@amd.com>,
	Bharata B Rao <bharata@amd.com>
Subject: [PATCH 2/5] x86/apic: Drop unused AMD EILVT macros
Date: Wed,  1 Apr 2026 10:26:33 +0530	[thread overview]
Message-ID: <8f2cb354f418dbd4bd6abce542a53bcee247688b.1775019269.git.naveen@kernel.org> (raw)
In-Reply-To: <cover.1775019269.git.naveen@kernel.org>

APIC_EILVT_NR_AMD_K8 and APIC_EILVT_LVTOFF are both unused. Drop them.

Signed-off-by: Naveen N Rao (AMD) <naveen@kernel.org>
Tested-by: Manali Shukla <manali.shukla@amd.com>
---
 arch/x86/include/asm/apicdef.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index f6d821656b02..bc125c4429dc 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -138,10 +138,8 @@
 #define APIC_SEOI	0x420
 #define APIC_IER	0x480
 #define APIC_EILVTn(n)	(0x500 + 0x10 * n)
-#define		APIC_EILVT_NR_AMD_K8	1	/* # of extended interrupts */
 #define		APIC_EILVT_NR_AMD_10H	4
 #define		APIC_EILVT_NR_MAX	APIC_EILVT_NR_AMD_10H
-#define		APIC_EILVT_LVTOFF(x)	(((x) >> 4) & 0xF)
 
 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
 #define APIC_BASE_MSR		0x800
-- 
2.53.0


  parent reply	other threads:[~2026-04-01  4:57 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-01  4:56 [PATCH 0/5] Support additional AMD EILVT registers Naveen N Rao (AMD)
2026-04-01  4:56 ` [PATCH 1/5] x86/apic: Drop AMD Extended Interrupt LVT macros Naveen N Rao (AMD)
2026-04-03 23:06   ` [tip: x86/cleanups] " tip-bot2 for Naveen N Rao (AMD)
2026-04-01  4:56 ` Naveen N Rao (AMD) [this message]
2026-04-01  4:56 ` [PATCH 3/5] perf/amd/ibs: Limit the max EILVT register count for AMD family 0x10 Naveen N Rao (AMD)
2026-04-01  4:56 ` [PATCH 4/5] x86/apic: Introduce a variable to track the number of EILVT registers Naveen N Rao (AMD)
2026-04-08 10:24   ` Naveen N Rao
2026-04-01  4:56 ` [PATCH 5/5] x86/apic: Drop APIC_EILVT_NR_MAX and switch to using apic_eilvt_count Naveen N Rao (AMD)

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