* [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
@ 2024-01-18 19:53 ` dregan
2024-01-19 17:12 ` Conor Dooley
` (2 more replies)
2024-01-18 19:53 ` [PATCH v2 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node dregan
` (8 subsequent siblings)
9 siblings, 3 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
Update the descriptions to reflect different families of broadband SoC and
use the general name bcmbca for ARM based SoC.
Add brcm,nand-use-wp property to have an option for disabling this
feature on broadband board design that does not use write protection.
Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
broadband board designs because they do not specify ecc setting in dts
but rather using the strap setting.
Remove the requirement of interrupts property to reflect the driver
code. Also add myself to the list of maintainers.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
---
Changes in v2:
- Revert the new compatible string nand-bcmbca
- Drop the BCM63168 compatible fix to avoid any potential ABI
incompatibility issue
- Simplify the explanation for brcm,nand-use-wp
- Keep the interrupt name requirement when interrupt number is specified
---
.../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
index f57e96374e67..56176ec1a992 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
@@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
maintainers:
- Brian Norris <computersforpeace@gmail.com>
- Kamal Dasu <kdasu.kdev@gmail.com>
+ - William Zhang <william.zhang@broadcom.com>
description: |
The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
@@ -18,9 +19,10 @@ description: |
supports basic PROGRAM and READ functions, among other features.
This controller was originally designed for STB SoCs (BCM7xxx) but is now
- available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
- iProc/Cygnus. Its history includes several similar (but not fully register
- compatible) versions.
+ available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
+ Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
+ Its history includes several similar (but not fully register compatible)
+ versions.
-- Additional SoC-specific NAND controller properties --
@@ -53,7 +55,7 @@ properties:
- brcm,brcmnand-v7.2
- brcm,brcmnand-v7.3
- const: brcm,brcmnand
- - description: BCM63138 SoC-specific NAND controller
+ - description: BCMBCA SoC-specific NAND controller
items:
- const: brcm,nand-bcm63138
- enum:
@@ -65,7 +67,7 @@ properties:
- const: brcm,nand-iproc
- const: brcm,brcmnand-v6.1
- const: brcm,brcmnand
- - description: BCM63168 SoC-specific NAND controller
+ - description: BCM63xx SoC-specific NAND controller
items:
- const: brcm,nand-bcm63168
- const: brcm,nand-bcm6368
@@ -111,6 +113,17 @@ properties:
earlier versions of this core that include WP
type: boolean
+ brcm,nand-use-wp:
+ description:
+ Use this property to indicate if board design uses
+ controller's write protection feature and connects its
+ NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
+ use this feature when this property does not exist.
+ Set to 0 if WP pins are not connected and feature is not
+ used. Set to 1 if WP pins are connected and feature is used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+
patternProperties:
"^nand@[a-f0-9]$":
type: object
@@ -137,6 +150,16 @@ patternProperties:
layout.
$ref: /schemas/types.yaml#/definitions/uint32
+ brcm,nand-ecc-use-strap:
+ description:
+ This flag is used by the driver to get the ecc strength and
+ spare area size from the SoC NAND boot strap setting. This
+ is commonly used by the BCMBCA SoC board design. If ecc
+ strength and spare area size are set by nand-ecc-strength
+ and brcm,nand-oob-sector-size in the dts, these settings
+ have precedence and override this flag.
+ $ref: /schemas/types.yaml#/definitions/flag
+
unevaluatedProperties: false
allOf:
@@ -177,6 +200,8 @@ allOf:
- const: iproc-idm
- const: iproc-ext
- if:
+ required:
+ - interrupts
properties:
interrupts:
minItems: 2
@@ -189,7 +214,6 @@ unevaluatedProperties: false
required:
- reg
- reg-names
- - interrupts
examples:
- |
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-18 19:53 ` [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs dregan
@ 2024-01-19 17:12 ` Conor Dooley
2024-01-19 18:36 ` William Zhang
2024-01-22 11:48 ` Jonas Gorski
2024-01-22 18:57 ` Rafał Miłecki
2 siblings, 1 reply; 21+ messages in thread
From: Conor Dooley @ 2024-01-19 17:12 UTC (permalink / raw)
To: dregan
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
[-- Attachment #1: Type: text/plain, Size: 5833 bytes --]
On Thu, Jan 18, 2024 at 11:53:47AM -0800, dregan@broadcom.com wrote:
> From: William Zhang <william.zhang@broadcom.com>
>
> Update the descriptions to reflect different families of broadband SoC and
> use the general name bcmbca for ARM based SoC.
>
> Add brcm,nand-use-wp property to have an option for disabling this
> feature on broadband board design that does not use write protection.
>
> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
> broadband board designs because they do not specify ecc setting in dts
> but rather using the strap setting.
>
> Remove the requirement of interrupts property to reflect the driver
> code. Also add myself to the list of maintainers.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> Reviewed-by: David Regan <dregan@broadcom.com>
> ---
> Changes in v2:
> - Revert the new compatible string nand-bcmbca
> - Drop the BCM63168 compatible fix to avoid any potential ABI
> incompatibility issue
> - Simplify the explanation for brcm,nand-use-wp
> - Keep the interrupt name requirement when interrupt number is specified
> ---
> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
> 1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> index f57e96374e67..56176ec1a992 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
> maintainers:
> - Brian Norris <computersforpeace@gmail.com>
> - Kamal Dasu <kdasu.kdev@gmail.com>
> + - William Zhang <william.zhang@broadcom.com>
>
> description: |
> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
> @@ -18,9 +19,10 @@ description: |
> supports basic PROGRAM and READ functions, among other features.
>
> This controller was originally designed for STB SoCs (BCM7xxx) but is now
> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
> - iProc/Cygnus. Its history includes several similar (but not fully register
> - compatible) versions.
> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
> + Its history includes several similar (but not fully register compatible)
> + versions.
>
> -- Additional SoC-specific NAND controller properties --
>
> @@ -53,7 +55,7 @@ properties:
> - brcm,brcmnand-v7.2
> - brcm,brcmnand-v7.3
> - const: brcm,brcmnand
> - - description: BCM63138 SoC-specific NAND controller
> + - description: BCMBCA SoC-specific NAND controller
> items:
> - const: brcm,nand-bcm63138
> - enum:
> @@ -65,7 +67,7 @@ properties:
> - const: brcm,nand-iproc
> - const: brcm,brcmnand-v6.1
> - const: brcm,brcmnand
> - - description: BCM63168 SoC-specific NAND controller
> + - description: BCM63xx SoC-specific NAND controller
> items:
> - const: brcm,nand-bcm63168
> - const: brcm,nand-bcm6368
> @@ -111,6 +113,17 @@ properties:
> earlier versions of this core that include WP
> type: boolean
>
> + brcm,nand-use-wp:
> + description:
> + Use this property to indicate if board design uses
> + controller's write protection feature and connects its
> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
> + use this feature when this property does not exist.
> + Set to 0 if WP pins are not connected and feature is not
> + used. Set to 1 if WP pins are connected and feature is used.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
This property does not make sense to me. "Driver defaults to use this
feature when the property does not exist" - either the property name is
backwards or the description is. Secondly, I don't get why the property
is an enum in the first place - depending on which if the name or
description is wrong, either 0 or 1 would overlap with the default.
> patternProperties:
> "^nand@[a-f0-9]$":
> type: object
> @@ -137,6 +150,16 @@ patternProperties:
> layout.
> $ref: /schemas/types.yaml#/definitions/uint32
>
> + brcm,nand-ecc-use-strap:
> + description:
> + This flag is used by the driver to get the ecc strength and
> + spare area size from the SoC NAND boot strap setting. This
> + is commonly used by the BCMBCA SoC board design. If ecc
> + strength and spare area size are set by nand-ecc-strength
> + and brcm,nand-oob-sector-size in the dts, these settings
> + have precedence and override this flag.
> + $ref: /schemas/types.yaml#/definitions/flag
This property I'm not all that sure about either. If the specific
properties that you mention here are not set in the DT what happens at
the moment?
I suppose what I am getting at is why are the bootstrap settings not
always used in the absence of specific values provided in the DT?
Thanks,
Conor.
> +
> unevaluatedProperties: false
>
> allOf:
> @@ -177,6 +200,8 @@ allOf:
> - const: iproc-idm
> - const: iproc-ext
> - if:
> + required:
> + - interrupts
> properties:
> interrupts:
> minItems: 2
> @@ -189,7 +214,6 @@ unevaluatedProperties: false
> required:
> - reg
> - reg-names
> - - interrupts
>
> examples:
> - |
> --
> 2.37.3
>
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-19 17:12 ` Conor Dooley
@ 2024-01-19 18:36 ` William Zhang
0 siblings, 0 replies; 21+ messages in thread
From: William Zhang @ 2024-01-19 18:36 UTC (permalink / raw)
To: Conor Dooley, dregan
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, anand.gore, kursad.oney, florian.fainelli, rafal,
bcm-kernel-feedback-list, andre.przywara, baruch,
linux-arm-kernel, dan.carpenter
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Hi,
On 01/19/2024 09:12 AM, Conor Dooley wrote:
> On Thu, Jan 18, 2024 at 11:53:47AM -0800, dregan@broadcom.com wrote:
>> From: William Zhang <william.zhang@broadcom.com>
>>
>> Update the descriptions to reflect different families of broadband SoC and
>> use the general name bcmbca for ARM based SoC.
>>
>> Add brcm,nand-use-wp property to have an option for disabling this
>> feature on broadband board design that does not use write protection.
>>
>> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
>> broadband board designs because they do not specify ecc setting in dts
>> but rather using the strap setting.
>>
>> Remove the requirement of interrupts property to reflect the driver
>> code. Also add myself to the list of maintainers.
>>
>> Signed-off-by: William Zhang <william.zhang@broadcom.com>
>> Reviewed-by: David Regan <dregan@broadcom.com>
>> ---
>> Changes in v2:
>> - Revert the new compatible string nand-bcmbca
>> - Drop the BCM63168 compatible fix to avoid any potential ABI
>> incompatibility issue
>> - Simplify the explanation for brcm,nand-use-wp
>> - Keep the interrupt name requirement when interrupt number is specified
>> ---
>> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
>> 1 file changed, 30 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> index f57e96374e67..56176ec1a992 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
>> maintainers:
>> - Brian Norris <computersforpeace@gmail.com>
>> - Kamal Dasu <kdasu.kdev@gmail.com>
>> + - William Zhang <william.zhang@broadcom.com>
>>
>> description: |
>> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
>> @@ -18,9 +19,10 @@ description: |
>> supports basic PROGRAM and READ functions, among other features.
>>
>> This controller was originally designed for STB SoCs (BCM7xxx) but is now
>> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
>> - iProc/Cygnus. Its history includes several similar (but not fully register
>> - compatible) versions.
>> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
>> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
>> + Its history includes several similar (but not fully register compatible)
>> + versions.
>>
>> -- Additional SoC-specific NAND controller properties --
>>
>> @@ -53,7 +55,7 @@ properties:
>> - brcm,brcmnand-v7.2
>> - brcm,brcmnand-v7.3
>> - const: brcm,brcmnand
>> - - description: BCM63138 SoC-specific NAND controller
>> + - description: BCMBCA SoC-specific NAND controller
>> items:
>> - const: brcm,nand-bcm63138
>> - enum:
>> @@ -65,7 +67,7 @@ properties:
>> - const: brcm,nand-iproc
>> - const: brcm,brcmnand-v6.1
>> - const: brcm,brcmnand
>> - - description: BCM63168 SoC-specific NAND controller
>> + - description: BCM63xx SoC-specific NAND controller
>> items:
>> - const: brcm,nand-bcm63168
>> - const: brcm,nand-bcm6368
>> @@ -111,6 +113,17 @@ properties:
>> earlier versions of this core that include WP
>> type: boolean
>>
>> + brcm,nand-use-wp:
>> + description:
>> + Use this property to indicate if board design uses
>> + controller's write protection feature and connects its
>> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
>> + use this feature when this property does not exist.
>> + Set to 0 if WP pins are not connected and feature is not
>> + used. Set to 1 if WP pins are connected and feature is used.
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + enum: [0, 1]
>
> This property does not make sense to me. "Driver defaults to use this
> feature when the property does not exist" - either the property name is
> backwards or the description is. Secondly, I don't get why the property
> is an enum in the first place - depending on which if the name or
> description is wrong, either 0 or 1 would overlap with the default.
>
The write protection feature was controlled by the module parameter
wp_on with default set to enabled. But not all the board use this
feature especially in BCMBCA broadband board. And module parameter is
not sufficient as different board can have different option. Add a
device tree property to override this default behavior and allow this
feature to be configured through the board dts on per board basis.
Maybe I can update the text here to
"By default the driver use a module parameter with default value set to
enable to control this feature for all boards. Use this dts property to
override the default behavior and enable/disable this feature through
board dts on per board basis"
>> patternProperties:
>> "^nand@[a-f0-9]$":
>> type: object
>> @@ -137,6 +150,16 @@ patternProperties:
>> layout.
>> $ref: /schemas/types.yaml#/definitions/uint32
>>
>> + brcm,nand-ecc-use-strap:
>> + description:
>> + This flag is used by the driver to get the ecc strength and
>> + spare area size from the SoC NAND boot strap setting. This
>> + is commonly used by the BCMBCA SoC board design. If ecc
>> + strength and spare area size are set by nand-ecc-strength
>> + and brcm,nand-oob-sector-size in the dts, these settings
>> + have precedence and override this flag.
>> + $ref: /schemas/types.yaml#/definitions/flag
>
> This property I'm not all that sure about either. If the specific
> properties that you mention here are not set in the DT what happens at
> the moment?
>
In that case, the ecc strength and oob size come from ONFI or nand id
decoding. But that is usually the minimum requirement and user can
choose to use stronger ecc as long as there is enough oob spare area in
the nand chip.
> I suppose what I am getting at is why are the bootstrap settings not
> always used in the absence of specific values provided in the DT?
>
This is because the STB, iProc and other chip and their board design may
not have or use the strap setting. But for BCMBCA SoC and board
reference design, we always use the strap setting.
> Thanks,
> Conor.
>
>> +
>> unevaluatedProperties: false
>>
>> allOf:
>> @@ -177,6 +200,8 @@ allOf:
>> - const: iproc-idm
>> - const: iproc-ext
>> - if:
>> + required:
>> + - interrupts
>> properties:
>> interrupts:
>> minItems: 2
>> @@ -189,7 +214,6 @@ unevaluatedProperties: false
>> required:
>> - reg
>> - reg-names
>> - - interrupts
>>
>> examples:
>> - |
>> --
>> 2.37.3
>>
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-18 19:53 ` [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs dregan
2024-01-19 17:12 ` Conor Dooley
@ 2024-01-22 11:48 ` Jonas Gorski
2024-01-22 17:33 ` William Zhang
2024-01-22 18:57 ` Rafał Miłecki
2 siblings, 1 reply; 21+ messages in thread
From: Jonas Gorski @ 2024-01-22 11:48 UTC (permalink / raw)
To: dregan
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
Hi,
On Thu, 18 Jan 2024 at 20:56, <dregan@broadcom.com> wrote:
>
> From: William Zhang <william.zhang@broadcom.com>
>
> Update the descriptions to reflect different families of broadband SoC and
> use the general name bcmbca for ARM based SoC.
>
> Add brcm,nand-use-wp property to have an option for disabling this
> feature on broadband board design that does not use write protection.
>
> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
> broadband board designs because they do not specify ecc setting in dts
> but rather using the strap setting.
>
> Remove the requirement of interrupts property to reflect the driver
> code. Also add myself to the list of maintainers.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> Reviewed-by: David Regan <dregan@broadcom.com>
> ---
> Changes in v2:
> - Revert the new compatible string nand-bcmbca
> - Drop the BCM63168 compatible fix to avoid any potential ABI
> incompatibility issue
> - Simplify the explanation for brcm,nand-use-wp
> - Keep the interrupt name requirement when interrupt number is specified
> ---
> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
> 1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> index f57e96374e67..56176ec1a992 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
> maintainers:
> - Brian Norris <computersforpeace@gmail.com>
> - Kamal Dasu <kdasu.kdev@gmail.com>
> + - William Zhang <william.zhang@broadcom.com>
>
> description: |
> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
> @@ -18,9 +19,10 @@ description: |
> supports basic PROGRAM and READ functions, among other features.
>
> This controller was originally designed for STB SoCs (BCM7xxx) but is now
> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
> - iProc/Cygnus. Its history includes several similar (but not fully register
> - compatible) versions.
> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
> + Its history includes several similar (but not fully register compatible)
> + versions.
>
> -- Additional SoC-specific NAND controller properties --
>
> @@ -53,7 +55,7 @@ properties:
> - brcm,brcmnand-v7.2
> - brcm,brcmnand-v7.3
> - const: brcm,brcmnand
> - - description: BCM63138 SoC-specific NAND controller
> + - description: BCMBCA SoC-specific NAND controller
> items:
> - const: brcm,nand-bcm63138
> - enum:
> @@ -65,7 +67,7 @@ properties:
> - const: brcm,nand-iproc
> - const: brcm,brcmnand-v6.1
> - const: brcm,brcmnand
> - - description: BCM63168 SoC-specific NAND controller
> + - description: BCM63xx SoC-specific NAND controller
Only the BCM63268 family has a v4.0 NAND controller with support for
ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
a v2.2.
So claiming this is a generic binding is wrong; you would need to add
the appropriate variants first. Or add another one for the BCM6368
NAND v2.x controllers, which is missing. You can find them used in
arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
> items:
> - const: brcm,nand-bcm63168
> - const: brcm,nand-bcm6368
Also bcm63168's v4.0 has a different register layout than bcm6368's
v2.x, so claiming brcm.nand-bcm6368 as compatible here is a bit weird.
It works because the register layout used is derived from the
"brcm,brcmnand-vX.Y" compatible, and the driver attaching to
'brcm,nand-bcm6368" only uses the shared interrupt registers which are
identical, the layout only diverges after that.
But then again these aren't really used as compatibles in the original
sense, and more like tags which describe different parts of the
controller, and the combination is the whole unique "compatible". Not
sure if this is how compatibles are supposed to be used. /rant.
Best Regards,
Jonas
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-22 11:48 ` Jonas Gorski
@ 2024-01-22 17:33 ` William Zhang
2024-01-23 10:34 ` Jonas Gorski
0 siblings, 1 reply; 21+ messages in thread
From: William Zhang @ 2024-01-22 17:33 UTC (permalink / raw)
To: Jonas Gorski, dregan
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, anand.gore, kursad.oney, florian.fainelli, rafal,
bcm-kernel-feedback-list, andre.przywara, baruch,
linux-arm-kernel, dan.carpenter
[-- Attachment #1: Type: text/plain, Size: 5229 bytes --]
Hi,
On 1/22/24 03:48, Jonas Gorski wrote:
> Hi,
>
> On Thu, 18 Jan 2024 at 20:56, <dregan@broadcom.com> wrote:
>>
>> From: William Zhang <william.zhang@broadcom.com>
>>
>> Update the descriptions to reflect different families of broadband SoC and
>> use the general name bcmbca for ARM based SoC.
>>
>> Add brcm,nand-use-wp property to have an option for disabling this
>> feature on broadband board design that does not use write protection.
>>
>> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
>> broadband board designs because they do not specify ecc setting in dts
>> but rather using the strap setting.
>>
>> Remove the requirement of interrupts property to reflect the driver
>> code. Also add myself to the list of maintainers.
>>
>> Signed-off-by: William Zhang <william.zhang@broadcom.com>
>> Reviewed-by: David Regan <dregan@broadcom.com>
>> ---
>> Changes in v2:
>> - Revert the new compatible string nand-bcmbca
>> - Drop the BCM63168 compatible fix to avoid any potential ABI
>> incompatibility issue
>> - Simplify the explanation for brcm,nand-use-wp
>> - Keep the interrupt name requirement when interrupt number is specified
>> ---
>> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
>> 1 file changed, 30 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> index f57e96374e67..56176ec1a992 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
>> maintainers:
>> - Brian Norris <computersforpeace@gmail.com>
>> - Kamal Dasu <kdasu.kdev@gmail.com>
>> + - William Zhang <william.zhang@broadcom.com>
>>
>> description: |
>> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
>> @@ -18,9 +19,10 @@ description: |
>> supports basic PROGRAM and READ functions, among other features.
>>
>> This controller was originally designed for STB SoCs (BCM7xxx) but is now
>> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
>> - iProc/Cygnus. Its history includes several similar (but not fully register
>> - compatible) versions.
>> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
>> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
>> + Its history includes several similar (but not fully register compatible)
>> + versions.
>>
>> -- Additional SoC-specific NAND controller properties --
>>
>> @@ -53,7 +55,7 @@ properties:
>> - brcm,brcmnand-v7.2
>> - brcm,brcmnand-v7.3
>> - const: brcm,brcmnand
>> - - description: BCM63138 SoC-specific NAND controller
>> + - description: BCMBCA SoC-specific NAND controller
>> items:
>> - const: brcm,nand-bcm63138
>> - enum:
>> @@ -65,7 +67,7 @@ properties:
>> - const: brcm,nand-iproc
>> - const: brcm,brcmnand-v6.1
>> - const: brcm,brcmnand
>> - - description: BCM63168 SoC-specific NAND controller
>> + - description: BCM63xx SoC-specific NAND controller
>
> Only the BCM63268 family has a v4.0 NAND controller with support for
> ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
> a v2.2.
>
> So claiming this is a generic binding is wrong; you would need to add
> the appropriate variants first. Or add another one for the BCM6368
> NAND v2.x controllers, which is missing. You can find them used in
> arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
>
I am not changing binding here but jsut update the description to
identify these MIPS based chip as bcm63xx family. This convention is
used in other IP blocks too. And yes this binding is not correct and I
noticed the same v2.x usage in the dtsi files you pointed out. So I
actually updated this binding in my v1 here
https://lore.kernel.org/lkml/20230606231252.94838-6-william.zhang@broadcom.com/
but there was some concern as it could possibly break the ABI in that
thread's discussion.
So I decided to take that change off this patch series since it is not
related to my change (ARM based BCMBCA family) either. It should be a
separate patch to address this MIPS based SoCs binding issue.
>> items:
>> - const: brcm,nand-bcm63168
>> - const: brcm,nand-bcm6368
>
> Also bcm63168's v4.0 has a different register layout than bcm6368's
> v2.x, so claiming brcm.nand-bcm6368 as compatible here is a bit weird.
> It works because the register layout used is derived from the
> "brcm,brcmnand-vX.Y" compatible, and the driver attaching to
> 'brcm,nand-bcm6368" only uses the shared interrupt registers which are
> identical, the layout only diverges after that.
>
> But then again these aren't really used as compatibles in the original
> sense, and more like tags which describe different parts of the
> controller, and the combination is the whole unique "compatible". Not
> sure if this is how compatibles are supposed to be used. /rant.
>
> Best Regards,
> Jonas
[-- Attachment #2: S/MIME Cryptographic Signature --]
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^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-22 17:33 ` William Zhang
@ 2024-01-23 10:34 ` Jonas Gorski
2024-01-23 19:24 ` William Zhang
0 siblings, 1 reply; 21+ messages in thread
From: Jonas Gorski @ 2024-01-23 10:34 UTC (permalink / raw)
To: William Zhang
Cc: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, anand.gore, kursad.oney, florian.fainelli, rafal,
bcm-kernel-feedback-list, andre.przywara, baruch,
linux-arm-kernel, dan.carpenter
On Mon, 22 Jan 2024 at 18:34, William Zhang <william.zhang@broadcom.com> wrote:
>
> Hi,
>
> On 1/22/24 03:48, Jonas Gorski wrote:
> > Hi,
> >
> > On Thu, 18 Jan 2024 at 20:56, <dregan@broadcom.com> wrote:
> >>
> >> From: William Zhang <william.zhang@broadcom.com>
> >>
> >> Update the descriptions to reflect different families of broadband SoC and
> >> use the general name bcmbca for ARM based SoC.
> >>
> >> Add brcm,nand-use-wp property to have an option for disabling this
> >> feature on broadband board design that does not use write protection.
> >>
> >> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
> >> broadband board designs because they do not specify ecc setting in dts
> >> but rather using the strap setting.
> >>
> >> Remove the requirement of interrupts property to reflect the driver
> >> code. Also add myself to the list of maintainers.
> >>
> >> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> >> Reviewed-by: David Regan <dregan@broadcom.com>
> >> ---
> >> Changes in v2:
> >> - Revert the new compatible string nand-bcmbca
> >> - Drop the BCM63168 compatible fix to avoid any potential ABI
> >> incompatibility issue
> >> - Simplify the explanation for brcm,nand-use-wp
> >> - Keep the interrupt name requirement when interrupt number is specified
> >> ---
> >> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
> >> 1 file changed, 30 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> >> index f57e96374e67..56176ec1a992 100644
> >> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> >> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> >> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
> >> maintainers:
> >> - Brian Norris <computersforpeace@gmail.com>
> >> - Kamal Dasu <kdasu.kdev@gmail.com>
> >> + - William Zhang <william.zhang@broadcom.com>
> >>
> >> description: |
> >> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
> >> @@ -18,9 +19,10 @@ description: |
> >> supports basic PROGRAM and READ functions, among other features.
> >>
> >> This controller was originally designed for STB SoCs (BCM7xxx) but is now
> >> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
> >> - iProc/Cygnus. Its history includes several similar (but not fully register
> >> - compatible) versions.
> >> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
> >> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
> >> + Its history includes several similar (but not fully register compatible)
> >> + versions.
> >>
> >> -- Additional SoC-specific NAND controller properties --
> >>
> >> @@ -53,7 +55,7 @@ properties:
> >> - brcm,brcmnand-v7.2
> >> - brcm,brcmnand-v7.3
> >> - const: brcm,brcmnand
> >> - - description: BCM63138 SoC-specific NAND controller
> >> + - description: BCMBCA SoC-specific NAND controller
> >> items:
> >> - const: brcm,nand-bcm63138
> >> - enum:
> >> @@ -65,7 +67,7 @@ properties:
> >> - const: brcm,nand-iproc
> >> - const: brcm,brcmnand-v6.1
> >> - const: brcm,brcmnand
> >> - - description: BCM63168 SoC-specific NAND controller
> >> + - description: BCM63xx SoC-specific NAND controller
> >
> > Only the BCM63268 family has a v4.0 NAND controller with support for
> > ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
> > a v2.2.
> >
> > So claiming this is a generic binding is wrong; you would need to add
> > the appropriate variants first. Or add another one for the BCM6368
> > NAND v2.x controllers, which is missing. You can find them used in
> > arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
> >
> I am not changing binding here but jsut update the description to
> identify these MIPS based chip as bcm63xx family. This convention is
> used in other IP blocks too. And yes this binding is not correct and I
> noticed the same v2.x usage in the dtsi files you pointed out. So I
> actually updated this binding in my v1 here
> https://lore.kernel.org/lkml/20230606231252.94838-6-william.zhang@broadcom.com/
> but there was some concern as it could possibly break the ABI in that
> thread's discussion.
That change did change the ABI that would have (AFAICT) broken it for BCM63168.
My point is: This binding in its current state is valid *only* for the
BCM63168 NAND controller, and not for any other BCM63xx NAND
controllers.
So changing the description to BCM63xx is wrong, unless you extend it
to also match the BCM6328/6362/6368 NAND controller bindings as used.
I can send a patch adding the missing binding parts, I actually have a
WIP one lying around as I started trying to address dts issues in the
MIPS bcm63xx dts(i) files a while ago.
Best Regards,
Jonas
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-23 10:34 ` Jonas Gorski
@ 2024-01-23 19:24 ` William Zhang
0 siblings, 0 replies; 21+ messages in thread
From: William Zhang @ 2024-01-23 19:24 UTC (permalink / raw)
To: Jonas Gorski
Cc: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, anand.gore, kursad.oney, florian.fainelli, rafal,
bcm-kernel-feedback-list, andre.przywara, baruch,
linux-arm-kernel, dan.carpenter
[-- Attachment #1: Type: text/plain, Size: 5285 bytes --]
On 1/23/24 02:34, Jonas Gorski wrote:
> On Mon, 22 Jan 2024 at 18:34, William Zhang <william.zhang@broadcom.com> wrote:
>>
>> Hi,
>>
>> On 1/22/24 03:48, Jonas Gorski wrote:
>>> Hi,
>>>
>>> On Thu, 18 Jan 2024 at 20:56, <dregan@broadcom.com> wrote:
>>>>
>>>> From: William Zhang <william.zhang@broadcom.com>
>>>>
>>>> Update the descriptions to reflect different families of broadband SoC and
>>>> use the general name bcmbca for ARM based SoC.
>>>>
>>>> Add brcm,nand-use-wp property to have an option for disabling this
>>>> feature on broadband board design that does not use write protection.
>>>>
>>>> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
>>>> broadband board designs because they do not specify ecc setting in dts
>>>> but rather using the strap setting.
>>>>
>>>> Remove the requirement of interrupts property to reflect the driver
>>>> code. Also add myself to the list of maintainers.
>>>>
>>>> Signed-off-by: William Zhang <william.zhang@broadcom.com>
>>>> Reviewed-by: David Regan <dregan@broadcom.com>
>>>> ---
>>>> Changes in v2:
>>>> - Revert the new compatible string nand-bcmbca
>>>> - Drop the BCM63168 compatible fix to avoid any potential ABI
>>>> incompatibility issue
>>>> - Simplify the explanation for brcm,nand-use-wp
>>>> - Keep the interrupt name requirement when interrupt number is specified
>>>> ---
>>>> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
>>>> 1 file changed, 30 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>>>> index f57e96374e67..56176ec1a992 100644
>>>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>>>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>>>> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
>>>> maintainers:
>>>> - Brian Norris <computersforpeace@gmail.com>
>>>> - Kamal Dasu <kdasu.kdev@gmail.com>
>>>> + - William Zhang <william.zhang@broadcom.com>
>>>>
>>>> description: |
>>>> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
>>>> @@ -18,9 +19,10 @@ description: |
>>>> supports basic PROGRAM and READ functions, among other features.
>>>>
>>>> This controller was originally designed for STB SoCs (BCM7xxx) but is now
>>>> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
>>>> - iProc/Cygnus. Its history includes several similar (but not fully register
>>>> - compatible) versions.
>>>> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
>>>> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
>>>> + Its history includes several similar (but not fully register compatible)
>>>> + versions.
>>>>
>>>> -- Additional SoC-specific NAND controller properties --
>>>>
>>>> @@ -53,7 +55,7 @@ properties:
>>>> - brcm,brcmnand-v7.2
>>>> - brcm,brcmnand-v7.3
>>>> - const: brcm,brcmnand
>>>> - - description: BCM63138 SoC-specific NAND controller
>>>> + - description: BCMBCA SoC-specific NAND controller
>>>> items:
>>>> - const: brcm,nand-bcm63138
>>>> - enum:
>>>> @@ -65,7 +67,7 @@ properties:
>>>> - const: brcm,nand-iproc
>>>> - const: brcm,brcmnand-v6.1
>>>> - const: brcm,brcmnand
>>>> - - description: BCM63168 SoC-specific NAND controller
>>>> + - description: BCM63xx SoC-specific NAND controller
>>>
>>> Only the BCM63268 family has a v4.0 NAND controller with support for
>>> ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
>>> a v2.2.
>>>
>>> So claiming this is a generic binding is wrong; you would need to add
>>> the appropriate variants first. Or add another one for the BCM6368
>>> NAND v2.x controllers, which is missing. You can find them used in
>>> arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
>>>
>> I am not changing binding here but jsut update the description to
>> identify these MIPS based chip as bcm63xx family. This convention is
>> used in other IP blocks too. And yes this binding is not correct and I
>> noticed the same v2.x usage in the dtsi files you pointed out. So I
>> actually updated this binding in my v1 here
>> https://lore.kernel.org/lkml/20230606231252.94838-6-william.zhang@broadcom.com/
>> but there was some concern as it could possibly break the ABI in that
>> thread's discussion.
>
> That change did change the ABI that would have (AFAICT) broken it for BCM63168.
>
> My point is: This binding in its current state is valid *only* for the
> BCM63168 NAND controller, and not for any other BCM63xx NAND
> controllers.
>
I didn't know that 6368 does not work. I will revert this change then.
> So changing the description to BCM63xx is wrong, unless you extend it
> to also match the BCM6328/6362/6368 NAND controller bindings as used.
>
> I can send a patch adding the missing binding parts, I actually have a
> WIP one lying around as I started trying to address dts issues in the
> MIPS bcm63xx dts(i) files a while ago.
>
Yeah and if you can update it to bcm63xx, that will be great!
> Best Regards,
> Jonas
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-18 19:53 ` [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs dregan
2024-01-19 17:12 ` Conor Dooley
2024-01-22 11:48 ` Jonas Gorski
@ 2024-01-22 18:57 ` Rafał Miłecki
2024-01-22 23:47 ` William Zhang
2 siblings, 1 reply; 21+ messages in thread
From: Rafał Miłecki @ 2024-01-22 18:57 UTC (permalink / raw)
To: dregan, miquel.raynal
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, bcm-kernel-feedback-list, andre.przywara,
baruch, linux-arm-kernel, dan.carpenter
On 2024-01-18 20:53, dregan@broadcom.com wrote:
> @@ -111,6 +113,17 @@ properties:
> earlier versions of this core that include WP
> type: boolean
>
> + brcm,nand-use-wp:
> + description:
> + Use this property to indicate if board design uses
> + controller's write protection feature and connects its
> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
> + use this feature when this property does not exist.
> + Set to 0 if WP pins are not connected and feature is not
> + used. Set to 1 if WP pins are connected and feature is used.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
> +
> patternProperties:
> "^nand@[a-f0-9]$":
> type: object
Please take a look at:
[PATCH 1/2] dt-bindings: mtd: brcmnand: add "no-wp" property
https://lore.kernel.org/linux-mtd/20211109115215.5bcef0db@xps13/T/
Miquel suggested a generic property applicable to all raw NANDs for
such purpose. Unfortunately I dropped the ball on that.
--
Rafał Miłecki
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs
2024-01-22 18:57 ` Rafał Miłecki
@ 2024-01-22 23:47 ` William Zhang
0 siblings, 0 replies; 21+ messages in thread
From: William Zhang @ 2024-01-22 23:47 UTC (permalink / raw)
To: Rafał Miłecki, dregan, miquel.raynal
Cc: dregan, richard, vigneshr, robh+dt, krzysztof.kozlowski+dt,
conor+dt, computersforpeace, kdasu.kdev, linux-mtd, devicetree,
linux-kernel, joel.peshkin, tomer.yacoby, dan.beygelman,
anand.gore, kursad.oney, florian.fainelli,
bcm-kernel-feedback-list, andre.przywara, baruch,
linux-arm-kernel, dan.carpenter
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Hi
On 1/22/24 10:57, Rafał Miłecki wrote:
> On 2024-01-18 20:53, dregan@broadcom.com wrote:
>> @@ -111,6 +113,17 @@ properties:
>> earlier versions of this core that include WP
>> type: boolean
>>
>> + brcm,nand-use-wp:
>> + description:
>> + Use this property to indicate if board design uses
>> + controller's write protection feature and connects its
>> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
>> + use this feature when this property does not exist.
>> + Set to 0 if WP pins are not connected and feature is not
>> + used. Set to 1 if WP pins are connected and feature is used.
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + enum: [0, 1]
>> +
>> patternProperties:
>> "^nand@[a-f0-9]$":
>> type: object
>
> Please take a look at:
> [PATCH 1/2] dt-bindings: mtd: brcmnand: add "no-wp" property
> https://lore.kernel.org/linux-mtd/20211109115215.5bcef0db@xps13/T/
>
> Miquel suggested a generic property applicable to all raw NANDs for
> such purpose. Unfortunately I dropped the ball on that.
>
This is already added in this commit
https://github.com/torvalds/linux/commit/cb57fae479be41d1233f5a49d4760de9a5692b6e.
But brcmnand nand controller has dedicated pin for WP and don't use
GPIO. So it does not apply to here. Basically brcmnand controller
handle the WP inside the controller and its driver.
brcm,nand-has-wp is SoC level flag and it actually is only needed for
some rare earlier versions of the controller. I don't want to break
that so I added this board level flag brcm,nand-use-wp for per board
control of the WP pin usage. As you know many BCMBCA reference boards
(like the 4908 based) do not connect WP pin so customer follow the same.
You can use this flag in the Asus GT-AC5300 board dts as you intended to
address in your patch.
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^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
2024-01-18 19:53 ` [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 03/10] arm64: " dregan
` (7 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts
files.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
---
Changes in v2: None
---
arch/arm/boot/dts/broadcom/bcm47622.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm63138.dtsi | 10 +++++++++-
arch/arm/boot/dts/broadcom/bcm63148.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm63178.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm6756.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm6846.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm6855.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm6878.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/broadcom/bcm947622.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm963138.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 12 +++++-------
arch/arm/boot/dts/broadcom/bcm963148.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm963178.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm96756.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm96846.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm96855.dts | 4 ++++
arch/arm/boot/dts/broadcom/bcm96878.dts | 4 ++++
17 files changed, 165 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
index 7cd38de118c3..55ff18043d96 100644
--- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
@@ -138,6 +138,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
index 4ef02283612b..3aaee1c6994e 100644
--- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
@@ -229,7 +229,15 @@ nand_controller: nand-controller@2000 {
reg-names = "nand", "nand-int-base";
status = "disabled";
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "nand";
+ interrupt-names = "nand_ctlrdy";
+ brcm,nand-use-wp = <0>;
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
};
serial@4400 {
diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
index 24431de1810e..6ecd530a7225 100644
--- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
@@ -119,5 +119,22 @@ hsspi: spi@1000 {
num-cs = <8>;
status = "disabled";
};
+
+ nand_controller: nand-controller@2000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x2000 0x600>, <0xf0 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/broadcom/bcm63178.dtsi b/arch/arm/boot/dts/broadcom/bcm63178.dtsi
index 3f9aed96babf..742991fc7544 100644
--- a/arch/arm/boot/dts/broadcom/bcm63178.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63178.dtsi
@@ -129,6 +129,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm/boot/dts/broadcom/bcm6756.dtsi b/arch/arm/boot/dts/broadcom/bcm6756.dtsi
index 1d8d957d65dd..0f08b99d93c2 100644
--- a/arch/arm/boot/dts/broadcom/bcm6756.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6756.dtsi
@@ -139,6 +139,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi
index cf92cf8c4693..856fd2352cca 100644
--- a/arch/arm/boot/dts/broadcom/bcm6846.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6846.dtsi
@@ -119,5 +119,22 @@ hsspi: spi@1000 {
num-cs = <8>;
status = "disabled";
};
+
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi
index 52d6bc89f9f8..ad6f63a92c3a 100644
--- a/arch/arm/boot/dts/broadcom/bcm6855.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6855.dtsi
@@ -129,6 +129,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
index 2c5d706bac7e..540aac1b82f9 100644
--- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
@@ -120,6 +120,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm/boot/dts/broadcom/bcm947622.dts b/arch/arm/boot/dts/broadcom/bcm947622.dts
index 93b8ce22678d..22e3c4508e1a 100644
--- a/arch/arm/boot/dts/broadcom/bcm947622.dts
+++ b/arch/arm/boot/dts/broadcom/bcm947622.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm963138.dts b/arch/arm/boot/dts/broadcom/bcm963138.dts
index 1b405c249213..450289d47dc7 100644
--- a/arch/arm/boot/dts/broadcom/bcm963138.dts
+++ b/arch/arm/boot/dts/broadcom/bcm963138.dts
@@ -29,3 +29,7 @@ &serial0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts
index b5af61853a07..22107d14a120 100644
--- a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts
+++ b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts
@@ -33,14 +33,12 @@ &serial1 {
&nand_controller {
status = "okay";
+};
- nand@0 {
- compatible = "brcm,nandcs";
- reg = <0>;
- nand-ecc-strength = <4>;
- nand-ecc-step-size = <512>;
- brcm,nand-oob-sectors-size = <16>;
- };
+&nandcs {
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ brcm,nand-oob-sector-size = <16>;
};
&ahci {
diff --git a/arch/arm/boot/dts/broadcom/bcm963148.dts b/arch/arm/boot/dts/broadcom/bcm963148.dts
index 1f5d6d783f09..aa08b473c7cd 100644
--- a/arch/arm/boot/dts/broadcom/bcm963148.dts
+++ b/arch/arm/boot/dts/broadcom/bcm963148.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm963178.dts b/arch/arm/boot/dts/broadcom/bcm963178.dts
index d036e99dd8d1..c0f504ac43a4 100644
--- a/arch/arm/boot/dts/broadcom/bcm963178.dts
+++ b/arch/arm/boot/dts/broadcom/bcm963178.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm96756.dts b/arch/arm/boot/dts/broadcom/bcm96756.dts
index 8b104f3fb14a..2ce998f2b84f 100644
--- a/arch/arm/boot/dts/broadcom/bcm96756.dts
+++ b/arch/arm/boot/dts/broadcom/bcm96756.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm96846.dts b/arch/arm/boot/dts/broadcom/bcm96846.dts
index 55852c229608..f4b9a07370ee 100644
--- a/arch/arm/boot/dts/broadcom/bcm96846.dts
+++ b/arch/arm/boot/dts/broadcom/bcm96846.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm96855.dts b/arch/arm/boot/dts/broadcom/bcm96855.dts
index 2ad880af2104..5c94063bceaf 100644
--- a/arch/arm/boot/dts/broadcom/bcm96855.dts
+++ b/arch/arm/boot/dts/broadcom/bcm96855.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/broadcom/bcm96878.dts b/arch/arm/boot/dts/broadcom/bcm96878.dts
index b7af8ade7a9d..910f7e125bad 100644
--- a/arch/arm/boot/dts/broadcom/bcm96878.dts
+++ b/arch/arm/boot/dts/broadcom/bcm96878.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 03/10] arm64: dts: broadcom: bcmbca: Add NAND controller node
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
2024-01-18 19:53 ` [PATCH v2 01/10] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs dregan
2024-01-18 19:53 ` [PATCH v2 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 04/10] mtd: rawnand: brcmnand: Rename bcm63138 nand driver dregan
` (6 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
Add support for Broadcom STB NAND controller in BCMBCA ARMv8 chip dts
files.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
---
Changes in v2:
- Add nand controller node label for 4908 so it is consistent with other
SoCs and can be referenced by board dts file
---
.../arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 5 ++++-
.../arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 17 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 17 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 17 +++++++++++++++++
.../arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 17 +++++++++++++++++
.../arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 17 +++++++++++++++++
.../arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 17 +++++++++++++++++
.../arm64/boot/dts/broadcom/bcmbca/bcm94912.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm963146.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm963158.dts | 4 ++++
.../arm64/boot/dts/broadcom/bcmbca/bcm96813.dts | 4 ++++
.../arm64/boot/dts/broadcom/bcmbca/bcm96856.dts | 4 ++++
.../arm64/boot/dts/broadcom/bcmbca/bcm96858.dts | 4 ++++
13 files changed, 130 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
index 2f124b027bbf..03a516d02501 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -589,7 +589,7 @@ hsspi: spi@1000 {
status = "disabled";
};
- nand-controller@1800 {
+ nand_controller: nand-controller@1800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
@@ -597,11 +597,14 @@ nand-controller@1800 {
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "nand_ctlrdy";
+ brcm,nand-use-wp = <0>;
status = "okay";
nandcs: nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
};
};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
index d658c81f7285..92a829542467 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -138,6 +138,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
index 4f474d47022e..2283fd81ece6 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -119,6 +119,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
index 909f254dc47d..c70177066a15 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -137,6 +137,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
index 685ae32951c9..09115e3af694 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -138,6 +138,23 @@ hsspi: spi@1000 {
status = "disabled";
};
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
index 820553ce541b..03ed65b35dbc 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -119,5 +119,22 @@ hsspi: spi@1000 {
num-cs = <8>;
status = "disabled";
};
+
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
};
};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
index 0eb93c298297..36f1fc06fcec 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -156,5 +156,22 @@ hsspi: spi@1000 {
num-cs = <8>;
status = "disabled";
};
+
+ nand_controller: nand-controller@1800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+ reg = <0x1800 0x600>, <0x2000 0x10>;
+ reg-names = "nand", "nand-int-base";
+ brcm,nand-use-wp = <0>;
+ status = "disabled";
+
+ nandcs: nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+ brcm,nand-ecc-use-strap;
+ };
+ };
};
};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
index e69cd683211a..4d1ea501e384 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
index db2c82d6dfd8..810b5a23da7b 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
index 25c12bc63545..3aaae5dbb568 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
index faba21f03120..6b167cc2af76 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
index 9808331eede2..d598cd618b57 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
index 1f561c8e13b0..e50ddbf6f58c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -32,3 +32,7 @@ &uart0 {
&hsspi {
status = "okay";
};
+
+&nand_controller {
+ status = "okay";
+};
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 04/10] mtd: rawnand: brcmnand: Rename bcm63138 nand driver
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (2 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 03/10] arm64: " dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 05/10] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface dregan
` (5 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
In preparing to support multiple BCMBCA SoCs, rename bcm63138 to bcmbca
in the driver code and driver file name.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
Changes in v2: None
---
drivers/mtd/nand/raw/brcmnand/Makefile | 2 +-
drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c | 99 -------------------
drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 99 +++++++++++++++++++
3 files changed, 100 insertions(+), 100 deletions(-)
delete mode 100644 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c
create mode 100644 drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile
index 9907e3ec4bb2..0536568c6467 100644
--- a/drivers/mtd/nand/raw/brcmnand/Makefile
+++ b/drivers/mtd/nand/raw/brcmnand/Makefile
@@ -2,7 +2,7 @@
# link order matters; don't link the more generic brcmstb_nand.o before the
# more specific iproc_nand.o, for instance
obj-$(CONFIG_MTD_NAND_BRCMNAND_IPROC) += iproc_nand.o
-obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND_BCM63XX) += bcm6368_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND_BRCMSTB) += brcmstb_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c
deleted file mode 100644
index 968c5b674b08..000000000000
--- a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c
+++ /dev/null
@@ -1,99 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright © 2015 Broadcom Corporation
- */
-
-#include <linux/device.h>
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-
-#include "brcmnand.h"
-
-struct bcm63138_nand_soc {
- struct brcmnand_soc soc;
- void __iomem *base;
-};
-
-#define BCM63138_NAND_INT_STATUS 0x00
-#define BCM63138_NAND_INT_EN 0x04
-
-enum {
- BCM63138_CTLRDY = BIT(4),
-};
-
-static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc)
-{
- struct bcm63138_nand_soc *priv =
- container_of(soc, struct bcm63138_nand_soc, soc);
- void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS;
- u32 val = brcmnand_readl(mmio);
-
- if (val & BCM63138_CTLRDY) {
- brcmnand_writel(val & ~BCM63138_CTLRDY, mmio);
- return true;
- }
-
- return false;
-}
-
-static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en)
-{
- struct bcm63138_nand_soc *priv =
- container_of(soc, struct bcm63138_nand_soc, soc);
- void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN;
- u32 val = brcmnand_readl(mmio);
-
- if (en)
- val |= BCM63138_CTLRDY;
- else
- val &= ~BCM63138_CTLRDY;
-
- brcmnand_writel(val, mmio);
-}
-
-static int bcm63138_nand_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct bcm63138_nand_soc *priv;
- struct brcmnand_soc *soc;
-
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
- soc = &priv->soc;
-
- priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base");
- if (IS_ERR(priv->base))
- return PTR_ERR(priv->base);
-
- soc->ctlrdy_ack = bcm63138_nand_intc_ack;
- soc->ctlrdy_set_enabled = bcm63138_nand_intc_set;
-
- return brcmnand_probe(pdev, soc);
-}
-
-static const struct of_device_id bcm63138_nand_of_match[] = {
- { .compatible = "brcm,nand-bcm63138" },
- {},
-};
-MODULE_DEVICE_TABLE(of, bcm63138_nand_of_match);
-
-static struct platform_driver bcm63138_nand_driver = {
- .probe = bcm63138_nand_probe,
- .remove_new = brcmnand_remove,
- .driver = {
- .name = "bcm63138_nand",
- .pm = &brcmnand_pm_ops,
- .of_match_table = bcm63138_nand_of_match,
- }
-};
-module_platform_driver(bcm63138_nand_driver);
-
-MODULE_LICENSE("GPL v2");
-MODULE_AUTHOR("Brian Norris");
-MODULE_DESCRIPTION("NAND driver for BCM63138");
diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
new file mode 100644
index 000000000000..3e2f3b79788d
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright © 2015 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcmbca_nand_soc {
+ struct brcmnand_soc soc;
+ void __iomem *base;
+};
+
+#define BCMBCA_NAND_INT_STATUS 0x00
+#define BCMBCA_NAND_INT_EN 0x04
+
+enum {
+ BCMBCA_CTLRDY = BIT(4),
+};
+
+static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc)
+{
+ struct bcmbca_nand_soc *priv =
+ container_of(soc, struct bcmbca_nand_soc, soc);
+ void __iomem *mmio = priv->base + BCMBCA_NAND_INT_STATUS;
+ u32 val = brcmnand_readl(mmio);
+
+ if (val & BCMBCA_CTLRDY) {
+ brcmnand_writel(val & ~BCMBCA_CTLRDY, mmio);
+ return true;
+ }
+
+ return false;
+}
+
+static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+ struct bcmbca_nand_soc *priv =
+ container_of(soc, struct bcmbca_nand_soc, soc);
+ void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN;
+ u32 val = brcmnand_readl(mmio);
+
+ if (en)
+ val |= BCMBCA_CTLRDY;
+ else
+ val &= ~BCMBCA_CTLRDY;
+
+ brcmnand_writel(val, mmio);
+}
+
+static int bcmbca_nand_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct bcmbca_nand_soc *priv;
+ struct brcmnand_soc *soc;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+ soc = &priv->soc;
+
+ priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base");
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ soc->ctlrdy_ack = bcmbca_nand_intc_ack;
+ soc->ctlrdy_set_enabled = bcmbca_nand_intc_set;
+
+ return brcmnand_probe(pdev, soc);
+}
+
+static const struct of_device_id bcmbca_nand_of_match[] = {
+ { .compatible = "brcm,nand-bcm63138" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, bcmbca_nand_of_match);
+
+static struct platform_driver bcmbca_nand_driver = {
+ .probe = bcmbca_nand_probe,
+ .remove_new = brcmnand_remove,
+ .driver = {
+ .name = "bcmbca_nand",
+ .pm = &brcmnand_pm_ops,
+ .of_match_table = bcmbca_nand_of_match,
+ }
+};
+module_platform_driver(bcmbca_nand_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Brian Norris");
+MODULE_DESCRIPTION("NAND driver for BCMBCA");
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 05/10] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (3 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 04/10] mtd: rawnand: brcmnand: Rename bcm63138 nand driver dregan
@ 2024-01-18 19:53 ` dregan
2024-01-19 5:36 ` Dan Carpenter
2024-01-18 19:53 ` [PATCH v2 06/10] mtd: rawnand: brcmnand: Add support for getting ecc setting from strap dregan
` (4 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
The BCMBCA broadband SoC integrates the NAND controller differently than
STB, iProc and other SoCs. It has different endianness for NAND cache
data.
Add a SoC read data bus shim for BCMBCA to meet the specific SoC need
and performance improvement using the optimized memcpy function on NAND
cache memory.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
---
Changes in v2:
- Drop the is_param argument to the read data bus function now that we
have the exec_op API to read the parameter page and ONFI data
- Remove be32_to_cpu from brcmnand_read_data_bus
---
drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 27 +++++++++++++++++++++
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 20 ++++++++++++---
drivers/mtd/nand/raw/brcmnand/brcmnand.h | 2 ++
3 files changed, 46 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
index 3e2f3b79788d..e97e13ae246c 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
@@ -26,6 +26,18 @@ enum {
BCMBCA_CTLRDY = BIT(4),
};
+#if defined(CONFIG_ARM64)
+#define ALIGN_REQ 8
+#else
+#define ALIGN_REQ 4
+#endif
+
+static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer)
+{
+ return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) &&
+ IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ);
+}
+
static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc)
{
struct bcmbca_nand_soc *priv =
@@ -56,6 +68,20 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en)
brcmnand_writel(val, mmio);
}
+static void bcmbca_read_data_bus(struct brcmnand_soc *soc,
+ void __iomem *flash_cache, u32 *buffer, int fc_words)
+{
+ /*
+ * memcpy can do unaligned aligned access depending on source
+ * and dest address, which is incompatible with nand cache. Fallback
+ * to the memcpy for io version
+ */
+ if (bcmbca_nand_is_buf_aligned((void *)flash_cache, buffer))
+ memcpy((void *)buffer, (void *)flash_cache, fc_words * 4);
+ else
+ memcpy_fromio((void *)buffer, flash_cache, fc_words * 4);
+}
+
static int bcmbca_nand_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -73,6 +99,7 @@ static int bcmbca_nand_probe(struct platform_device *pdev)
soc->ctlrdy_ack = bcmbca_nand_intc_ack;
soc->ctlrdy_set_enabled = bcmbca_nand_intc_set;
+ soc->read_data_bus = bcmbca_read_data_bus;
return brcmnand_probe(pdev, soc);
}
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 8faca43ae1ff..73fdf7ce21aa 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -851,6 +851,20 @@ static inline u32 edu_readl(struct brcmnand_controller *ctrl,
return brcmnand_readl(ctrl->edu_base + offs);
}
+static inline void brcmnand_read_data_bus(struct brcmnand_controller *ctrl,
+ void __iomem *flash_cache, u32 *buffer, int fc_words)
+{
+ struct brcmnand_soc *soc = ctrl->soc;
+ int i;
+
+ if (soc->read_data_bus) {
+ soc->read_data_bus(soc, flash_cache, buffer, fc_words);
+ } else {
+ for (i = 0; i < fc_words; i++)
+ buffer[i] = brcmnand_read_fc(ctrl, i);
+ }
+}
+
static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl)
{
@@ -1975,7 +1989,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
{
struct brcmnand_host *host = nand_get_controller_data(chip);
struct brcmnand_controller *ctrl = host->ctrl;
- int i, j, ret = 0;
+ int i, ret = 0;
brcmnand_clear_ecc_addr(ctrl);
@@ -1988,8 +2002,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
if (likely(buf)) {
brcmnand_soc_data_bus_prepare(ctrl->soc, false);
- for (j = 0; j < FC_WORDS; j++, buf++)
- *buf = brcmnand_read_fc(ctrl, j);
+ brcmnand_read_data_bus(ctrl, ctrl->nand_fc, buf, FC_WORDS);
+ buf += FC_WORDS;
brcmnand_soc_data_bus_unprepare(ctrl->soc, false);
}
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
index 928114c0be5e..7261a69989fe 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
@@ -24,6 +24,8 @@ struct brcmnand_soc {
void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
bool is_param);
+ void (*read_data_bus)(struct brcmnand_soc *soc, void __iomem *flash_cache,
+ u32 *buffer, int fc_words);
const struct brcmnand_io_ops *ops;
};
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 05/10] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface
2024-01-18 19:53 ` [PATCH v2 05/10] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface dregan
@ 2024-01-19 5:36 ` Dan Carpenter
2024-01-19 18:04 ` William Zhang
0 siblings, 1 reply; 21+ messages in thread
From: Dan Carpenter @ 2024-01-19 5:36 UTC (permalink / raw)
To: dregan
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel
On Thu, Jan 18, 2024 at 11:53:51AM -0800, dregan@broadcom.com wrote:
> diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
> index 3e2f3b79788d..e97e13ae246c 100644
> --- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
> @@ -26,6 +26,18 @@ enum {
> BCMBCA_CTLRDY = BIT(4),
> };
>
> +#if defined(CONFIG_ARM64)
> +#define ALIGN_REQ 8
> +#else
> +#define ALIGN_REQ 4
> +#endif
> +
> +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer)
> +{
> + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) &&
> + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ);
> +}
> +
> static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc)
> {
> struct bcmbca_nand_soc *priv =
> @@ -56,6 +68,20 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en)
> brcmnand_writel(val, mmio);
> }
>
> +static void bcmbca_read_data_bus(struct brcmnand_soc *soc,
> + void __iomem *flash_cache, u32 *buffer, int fc_words)
> +{
> + /*
> + * memcpy can do unaligned aligned access depending on source
> + * and dest address, which is incompatible with nand cache. Fallback
> + * to the memcpy for io version
> + */
> + if (bcmbca_nand_is_buf_aligned((void *)flash_cache, buffer))
> + memcpy((void *)buffer, (void *)flash_cache, fc_words * 4);
> + else
> + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4);
> +}
This comment is confusing or maybe the if statement is reversed...
We're falling back to memcpy_fromio() for the unaligned accesses but the
comment says we're falling back to memcpy().
regards,
dan carpenter
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v2 05/10] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface
2024-01-19 5:36 ` Dan Carpenter
@ 2024-01-19 18:04 ` William Zhang
0 siblings, 0 replies; 21+ messages in thread
From: William Zhang @ 2024-01-19 18:04 UTC (permalink / raw)
To: Dan Carpenter, dregan
Cc: dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, anand.gore, kursad.oney, florian.fainelli, rafal,
bcm-kernel-feedback-list, andre.przywara, baruch,
linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 1883 bytes --]
Hi,
On 01/18/2024 09:36 PM, Dan Carpenter wrote:
> On Thu, Jan 18, 2024 at 11:53:51AM -0800, dregan@broadcom.com wrote:
>> diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
>> index 3e2f3b79788d..e97e13ae246c 100644
>> --- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
>> +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
>> @@ -26,6 +26,18 @@ enum {
>> BCMBCA_CTLRDY = BIT(4),
>> };
>>
>> +#if defined(CONFIG_ARM64)
>> +#define ALIGN_REQ 8
>> +#else
>> +#define ALIGN_REQ 4
>> +#endif
>> +
>> +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer)
>> +{
>> + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) &&
>> + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ);
>> +}
>> +
>> static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc)
>> {
>> struct bcmbca_nand_soc *priv =
>> @@ -56,6 +68,20 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en)
>> brcmnand_writel(val, mmio);
>> }
>>
>> +static void bcmbca_read_data_bus(struct brcmnand_soc *soc,
>> + void __iomem *flash_cache, u32 *buffer, int fc_words)
>> +{
>> + /*
>> + * memcpy can do unaligned aligned access depending on source
>> + * and dest address, which is incompatible with nand cache. Fallback
>> + * to the memcpy for io version
>> + */
>> + if (bcmbca_nand_is_buf_aligned((void *)flash_cache, buffer))
>> + memcpy((void *)buffer, (void *)flash_cache, fc_words * 4);
>> + else
>> + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4);
>> +}
>
> This comment is confusing or maybe the if statement is reversed...
> We're falling back to memcpy_fromio() for the unaligned accesses but the
> comment says we're falling back to memcpy().
>
Yes that's a typo. Fallback to memcpy_fromio when unalgined. Will
update the comments in v3. Thanks!
> regards,
> dan carpenter
>
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4212 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 06/10] mtd: rawnand: brcmnand: Add support for getting ecc setting from strap
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (4 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 05/10] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 07/10] mtd: rawnand: brcmnand: Support write protection setting from dts dregan
` (3 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
BCMBCA broadband SoC based board design does not specify ecc setting in
dts but rather use the SoC NAND strap info to obtain the ecc strength
and spare area size setting. Add brcm,nand-ecc-use-strap dts propety for
this purpose and update driver to support this option.
The generic nand ecc settings still take precedence over this flag. For
example, if nand-ecc-strength is set in the dts, the driver ignores the
strap setting and falls back to original behavior. This makes sure that
the existing BCMBCA board dts still works the old way even the strap
flag is set in the BCMBCA chip dtsi.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
---
Changes in v2:
- Minor cosmetic fixes
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 83 ++++++++++++++++++++++--
1 file changed, 76 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 73fdf7ce21aa..869ea64e9189 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -1038,6 +1038,19 @@ static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl)
return -1;
}
+static int brcmnand_get_sector_size_1k(struct brcmnand_host *host)
+{
+ struct brcmnand_controller *ctrl = host->ctrl;
+ int shift = brcmnand_sector_1k_shift(ctrl);
+ u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+ BRCMNAND_CS_ACC_CONTROL);
+
+ if (shift < 0)
+ return 0;
+
+ return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1;
+}
+
static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val)
{
struct brcmnand_controller *ctrl = host->ctrl;
@@ -1055,6 +1068,38 @@ static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val)
nand_writereg(ctrl, acc_control_offs, tmp);
}
+static int brcmnand_get_spare_size(struct brcmnand_host *host)
+{
+ struct brcmnand_controller *ctrl = host->ctrl;
+ u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+ BRCMNAND_CS_ACC_CONTROL);
+ u32 acc = nand_readreg(ctrl, acc_control_offs);
+
+ return (acc & brcmnand_spare_area_mask(ctrl));
+}
+
+static int brcmnand_get_ecc_strength(struct brcmnand_host *host)
+{
+ struct brcmnand_controller *ctrl = host->ctrl;
+ u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+ BRCMNAND_CS_ACC_CONTROL);
+ int sector_size_1k = brcmnand_get_sector_size_1k(host);
+ int spare_area_size, ecc_level, ecc_strength;
+ u32 acc;
+
+ spare_area_size = brcmnand_get_spare_size(host);
+ acc = nand_readreg(ctrl, acc_control_offs);
+ ecc_level = (acc & brcmnand_ecc_level_mask(ctrl)) >> ctrl->ecc_level_shift;
+ if (sector_size_1k)
+ ecc_strength = ecc_level * 2;
+ else if (spare_area_size == 16 && ecc_level == 15)
+ ecc_strength = 1; /* hamming */
+ else
+ ecc_strength = ecc_level;
+
+ return ecc_strength;
+}
+
/***********************************************************************
* CS_NAND_SELECT
***********************************************************************/
@@ -2622,19 +2667,43 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
nanddev_get_memorg(&chip->base);
struct brcmnand_controller *ctrl = host->ctrl;
struct brcmnand_cfg *cfg = &host->hwcfg;
- char msg[128];
+ struct device_node *np = nand_get_flash_node(chip);
u32 offs, tmp, oob_sector;
- int ret;
+ int ret, sector_size_1k = 0;
+ bool use_strap = false;
+ char msg[128];
memset(cfg, 0, sizeof(*cfg));
+ use_strap = of_property_read_bool(np, "brcm,nand-ecc-use-strap");
- ret = of_property_read_u32(nand_get_flash_node(chip),
- "brcm,nand-oob-sector-size",
+ /*
+ * Set ECC size and strength based on hw configuration from strap
+ * if device tree does not specify them and use strap property is set
+ * If ecc strength is set in dts, don't use strap setting.
+ */
+ if (chip->ecc.strength)
+ use_strap = 0;
+
+ if (use_strap) {
+ chip->ecc.strength = brcmnand_get_ecc_strength(host);
+ sector_size_1k = brcmnand_get_sector_size_1k(host);
+ if (chip->ecc.size == 0) {
+ if (sector_size_1k < 0)
+ chip->ecc.size = 512;
+ else
+ chip->ecc.size = 512 << sector_size_1k;
+ }
+ }
+
+ ret = of_property_read_u32(np, "brcm,nand-oob-sector-size",
&oob_sector);
if (ret) {
- /* Use detected size */
- cfg->spare_area_size = mtd->oobsize /
- (mtd->writesize >> FC_SHIFT);
+ if (use_strap)
+ cfg->spare_area_size = brcmnand_get_spare_size(host);
+ else
+ /* Use detected size */
+ cfg->spare_area_size = mtd->oobsize /
+ (mtd->writesize >> FC_SHIFT);
} else {
cfg->spare_area_size = oob_sector;
}
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 07/10] mtd: rawnand: brcmnand: Support write protection setting from dts
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (5 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 06/10] mtd: rawnand: brcmnand: Add support for getting ecc setting from strap dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 08/10] mtd: rawnand: brcmnand: exec_op helper functions return type fixes dregan
` (2 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: William Zhang <william.zhang@broadcom.com>
The write protection feature is controlled by the module parameter wp_on
with default set to enabled. But not all the board use this feature
especially in BCMBCA broadband board. And module parameter is not
sufficient as different board can have different option. Add a device
tree property and allow this feature to be configured through the board
dts on per board basis.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Kamal Dasu <kamal.dasu@broadcom.com>
Reviewed-by: David Regan <dregan@broadcom.com>
---
Changes in v2: None
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 869ea64e9189..9a904c7c6dad 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -3081,7 +3081,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
struct brcmnand_controller *ctrl;
struct brcmnand_host *host;
struct resource *res;
- int ret;
+ int ret, wp_dt;
if (dn && !of_match_node(brcmnand_of_match, dn))
return -ENODEV;
@@ -3218,6 +3218,12 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
/* Disable XOR addressing */
brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0);
+ /* Not all boards support write protect (WP), check DT property */
+ if (of_property_read_u32(dn, "brcm,nand-use-wp", &wp_dt) == 0) {
+ if (wp_dt >= 0 && wp_dt <= 2)
+ wp_on = wp_dt;
+ }
+
if (ctrl->features & BRCMNAND_HAS_WP) {
/* Permanently disable write protection */
if (wp_on == 2)
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 08/10] mtd: rawnand: brcmnand: exec_op helper functions return type fixes
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (6 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 07/10] mtd: rawnand: brcmnand: Support write protection setting from dts dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 09/10] mtd: rawnand: brcmnand: update log level messages dregan
2024-01-18 19:53 ` [PATCH v2 10/10] mtd: rawnand: brcmnand: allow for on-die ecc dregan
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: David Regan <dregan@broadcom.com>
fix return type for exec_op reset and status detect helper functions
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: http://lists.infradead.org/pipermail/linux-mtd/2023-December/102423.html
Fixes: 3cc4718fa644 ("mtd: rawnand: brcmnand: exec_op implementation")
Signed-off-by: David Regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v2:
- Added to patch series
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 9a904c7c6dad..6b5d76eff0ec 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -625,7 +625,7 @@ enum {
/* Only for v7.2 */
#define ACC_CONTROL_ECC_EXT_SHIFT 13
-static u8 brcmnand_status(struct brcmnand_host *host);
+static int brcmnand_status(struct brcmnand_host *host);
static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl)
{
@@ -1749,7 +1749,7 @@ static int brcmnand_waitfunc(struct nand_chip *chip)
INTFC_FLASH_STATUS;
}
-static u8 brcmnand_status(struct brcmnand_host *host)
+static int brcmnand_status(struct brcmnand_host *host)
{
struct nand_chip *chip = &host->chip;
struct mtd_info *mtd = nand_to_mtd(chip);
@@ -1760,7 +1760,7 @@ static u8 brcmnand_status(struct brcmnand_host *host)
return brcmnand_waitfunc(chip);
}
-static u8 brcmnand_reset(struct brcmnand_host *host)
+static int brcmnand_reset(struct brcmnand_host *host)
{
struct nand_chip *chip = &host->chip;
@@ -2492,11 +2492,14 @@ static int brcmnand_exec_op(struct nand_chip *chip,
if (brcmnand_op_is_status(op)) {
status = op->instrs[1].ctx.data.buf.in;
- *status = brcmnand_status(host);
+ ret = brcmnand_status(host);
+ if (ret < 0)
+ return ret;
+
+ *status = ret & 0xFF;
return 0;
- }
- else if (brcmnand_op_is_reset(op)) {
+ } else if (brcmnand_op_is_reset(op)) {
ret = brcmnand_reset(host);
if (ret < 0)
return ret;
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 09/10] mtd: rawnand: brcmnand: update log level messages
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (7 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 08/10] mtd: rawnand: brcmnand: exec_op helper functions return type fixes dregan
@ 2024-01-18 19:53 ` dregan
2024-01-18 19:53 ` [PATCH v2 10/10] mtd: rawnand: brcmnand: allow for on-die ecc dregan
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: David Regan <dregan@broadcom.com>
Update log level messages so that more critical messages
can be seen.
Signed-off-by: David Regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v2:
- Added to patch series
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 6b5d76eff0ec..a4e311b6798c 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -1143,7 +1143,7 @@ static int bcmnand_ctrl_poll_status(struct brcmnand_host *host,
if ((val & mask) == expected_val)
return 0;
- dev_warn(ctrl->dev, "timeout on status poll (expected %x got %x)\n",
+ dev_err(ctrl->dev, "timeout on status poll (expected %x got %x)\n",
expected_val, val & mask);
return -ETIMEDOUT;
@@ -2196,7 +2196,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip,
return err;
}
- dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n",
+ dev_err(ctrl->dev, "uncorrectable error at 0x%llx\n",
(unsigned long long)err_addr);
mtd->ecc_stats.failed++;
/* NAND layer expects zero on ECC errors */
@@ -2211,7 +2211,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip,
err = brcmnand_read_by_pio(mtd, chip, addr, trans, buf,
oob, &err_addr);
- dev_dbg(ctrl->dev, "corrected error at 0x%llx\n",
+ dev_info(ctrl->dev, "corrected error at 0x%llx\n",
(unsigned long long)err_addr);
mtd->ecc_stats.corrected += corrected;
/* Always exceed the software-imposed threshold */
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 10/10] mtd: rawnand: brcmnand: allow for on-die ecc
2024-01-18 19:53 [PATCH v2 00/10] mtd: rawnand: brcmnand: driver and doc updates dregan
` (8 preceding siblings ...)
2024-01-18 19:53 ` [PATCH v2 09/10] mtd: rawnand: brcmnand: update log level messages dregan
@ 2024-01-18 19:53 ` dregan
9 siblings, 0 replies; 21+ messages in thread
From: dregan @ 2024-01-18 19:53 UTC (permalink / raw)
To: dregan, dregan, miquel.raynal, richard, vigneshr, robh+dt,
krzysztof.kozlowski+dt, conor+dt, computersforpeace, kdasu.kdev,
linux-mtd, devicetree, linux-kernel, joel.peshkin, tomer.yacoby,
dan.beygelman, william.zhang, anand.gore, kursad.oney,
florian.fainelli, rafal, bcm-kernel-feedback-list,
andre.przywara, baruch, linux-arm-kernel, dan.carpenter
From: David Regan <dregan@broadcom.com>
Allow settings for on-die ecc such that if on-die ECC is selected
don't error out but require ECC strap setting of zero
Signed-off-by: David Regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v2:
- Added to patch series
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index a4e311b6798c..42526f3250c9 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2727,9 +2727,11 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
cfg->blk_adr_bytes = get_blk_adr_bytes(mtd->size, mtd->writesize);
if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
- dev_err(ctrl->dev, "only HW ECC supported; selected: %d\n",
- chip->ecc.engine_type);
- return -EINVAL;
+ if (chip->ecc.strength) {
+ dev_err(ctrl->dev, "ERROR!!! HW ECC must be set to zero for non-hardware ECC; selected: %d\n",
+ chip->ecc.strength);
+ return -EINVAL;
+ }
}
if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) {
@@ -2797,7 +2799,11 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
if (ret)
return ret;
- brcmnand_set_ecc_enabled(host, 1);
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE) {
+ dev_dbg(ctrl->dev, "Disable HW ECC for on-die ECC\n");
+ brcmnand_set_ecc_enabled(host, 0);
+ } else
+ brcmnand_set_ecc_enabled(host, 1);
brcmnand_print_cfg(host, msg, cfg);
dev_info(ctrl->dev, "detected %s\n", msg);
--
2.37.3
^ permalink raw reply [flat|nested] 21+ messages in thread