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From: Shanker Donthineni <shankerd@codeaurora.org>
To: Marc Zyngier <marc.zyngier@arm.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>
Subject: Re: [RFC PATCH 10/33] irqchip/gic-v4-its: Allow use of indirect VCPU tables
Date: Mon, 13 Feb 2017 16:14:17 -0600	[thread overview]
Message-ID: <90c5e45f-3eea-9e84-08b2-919edc15e2c8@codeaurora.org> (raw)
In-Reply-To: <1484648454-21216-11-git-send-email-marc.zyngier@arm.com>

Hi Marc,


On 01/17/2017 04:20 AM, Marc Zyngier wrote:
> The VCPU tables can be quite sparse as well, and it makes sense
> to use indirect tables as well if possible.
The VCPU table has maximum of 2^16 entries as compared to 2^32 entries 
in device table. ITS hardware implementations may not support indirect 
table because of low memory requirement.
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>   drivers/irqchip/irq-gic-v3-its.c | 20 +++++++++++++-------
>   1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c
> b/drivers/irqchip/irq-gic-v3-its.c
> index c92ff4d..14305db1 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -1060,10 +1060,13 @@ static int its_setup_baser(struct its_node *its,
> struct its_baser *baser,
>   	return 0;
>   }
>   
> -static bool its_parse_baser_device(struct its_node *its, struct its_baser
> *baser,
> -				   u32 psz, u32 *order)
> +static bool its_parse_indirect_baser(struct its_node *its,
> +				     struct its_baser *baser,
> +				     u32 psz, u32 *order)
>   {
> -	u64 esz = GITS_BASER_ENTRY_SIZE(its_read_baser(its, baser));
> +	u64 tmp = its_read_baser(its, baser);
> +	u64 type = GITS_BASER_TYPE(tmp);
> +	u64 esz = GITS_BASER_ENTRY_SIZE(tmp);
>   	u64 val = GITS_BASER_InnerShareable | GITS_BASER_WaWb;
>   	u32 ids = its->device_ids;
>   	u32 new_order = *order;
> @@ -1102,8 +1105,9 @@ static bool its_parse_baser_device(struct its_node
> *its, struct its_baser *baser
>   	if (new_order >= MAX_ORDER) {
>   		new_order = MAX_ORDER - 1;
>   		ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz);
> -		pr_warn("ITS@%pa: Device Table too large, reduce ids
> %u->%u\n",
> -			&its->phys_base, its->device_ids, ids);
> +		pr_warn("ITS@%pa: %s Table too large, reduce ids
> %u->%u\n",
> +			&its->phys_base, its_base_type_string[type],
> +			its->device_ids, ids);
>   	}
>   
>   	*order = new_order;
> @@ -1154,8 +1158,10 @@ static int its_alloc_tables(struct its_node *its)
>   		if (type == GITS_BASER_TYPE_NONE)
>   			continue;
>   
> -		if (type == GITS_BASER_TYPE_DEVICE)
> -			indirect = its_parse_baser_device(its, baser, psz,
> &order);
Try to allocate maximum memory as possible then attempt enabling 
indirection table.

#define ITS_VPES_MAX            (65536)

if (type == GITS_BASER_TYPE_VCPU)
          order = get_order(esz * ITS_VPES_MAX);

On Qualcomm implementation, 1MBytes, 64536  * 16Byte (vPE entry size) 
memory is enough to sparse 16bit vPE.
> +		if (type == GITS_BASER_TYPE_DEVICE ||
> +		    type == GITS_BASER_TYPE_VCPU)
> +			indirect = its_parse_indirect_baser(its, baser,
> +							    psz, &order);
>   
>   		err = its_setup_baser(its, baser, cache, shr, psz, order,
> indirect);
>   		if (err < 0) {

-- 
Shanker Donthineni
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

  parent reply	other threads:[~2017-02-13 22:14 UTC|newest]

Thread overview: 121+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-17 10:20 [RFC PATCH 00/33] irqchip: Core support for GICv4 Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 01/33] irqchip/gic-v3: Add redistributor iterator Marc Zyngier
2017-02-13  9:39   ` Thomas Gleixner
2017-02-13 21:12   ` Shanker Donthineni
2017-02-16 12:47   ` Auger Eric
2017-06-19 15:26     ` Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 02/33] irqchip/gic-v3: Add VLPI/DirectLPI discovery Marc Zyngier
2017-02-13  9:39   ` Thomas Gleixner
2017-02-13 21:39   ` Shanker Donthineni
2017-02-16 13:19   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 03/33] irqchip/gic-v3-its: Refactor command encoding Marc Zyngier
2017-02-13  9:54   ` Thomas Gleixner
2017-02-16 13:19   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 04/33] irqchip/gic-v3-its: Move LPI definitions around Marc Zyngier
2017-02-13  9:55   ` Thomas Gleixner
2017-02-16 13:22   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 05/33] irqchip/gic-v3-its: Zero command on allocation Marc Zyngier
2017-02-13  9:55   ` Thomas Gleixner
2017-01-17 10:20 ` [RFC PATCH 06/33] irqchip/gic-v3-its: Add probing for VLPI properties Marc Zyngier
2017-02-13 10:00   ` Thomas Gleixner
2017-02-16 13:46     ` Auger Eric
2017-02-13 21:58   ` Shanker Donthineni
2017-01-17 10:20 ` [RFC PATCH 07/33] irqchip/gic-v3-its: Macro-ize its_send_single_command Marc Zyngier
2017-02-13 10:24   ` Thomas Gleixner
2017-02-16 14:59   ` Auger Eric
2017-02-17  6:15   ` Auger Eric
2017-06-19 15:38     ` Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 08/33] irqchip/gic-v3-its: Implement irq_set_irqchip_state for pending state Marc Zyngier
2017-02-13 10:28   ` Thomas Gleixner
2017-02-16 14:59   ` Auger Eric
2017-02-17  6:15   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 09/33] irqchip/gic-v3-its: Split out property table allocation Marc Zyngier
2017-02-13 10:28   ` Thomas Gleixner
2017-02-17  6:15   ` Auger Eric
2017-06-19 15:42     ` Marc Zyngier
2017-02-17 20:40   ` Prakash B
2017-01-17 10:20 ` [RFC PATCH 10/33] irqchip/gic-v4-its: Allow use of indirect VCPU tables Marc Zyngier
2017-02-13 10:28   ` Thomas Gleixner
2017-02-13 22:14   ` Shanker Donthineni [this message]
2017-06-19 14:47     ` Marc Zyngier
2017-02-17  6:15   ` Auger Eric
2017-03-16 21:50   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 11/33] irqchip/gic-v3-its: Split out pending table allocation Marc Zyngier
2017-02-13 10:29   ` Thomas Gleixner
2017-02-13 22:31   ` Shanker Donthineni
2017-03-16  8:57   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 12/33] irqchip/gic-v3-its: Rework LPI freeing Marc Zyngier
2017-02-13 10:30   ` Thomas Gleixner
2017-03-16  8:57   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 13/33] irqchip/gic-v3-its: Generalize device table allocation Marc Zyngier
2017-02-13 10:31   ` Thomas Gleixner
2017-03-16  8:57   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 14/33] irqchip/gic-v3-its: Generalize LPI configuration Marc Zyngier
2017-02-13 10:32   ` Thomas Gleixner
2017-03-16  8:57   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 15/33] irqchip/gic-v4: Add management structure definitions Marc Zyngier
2017-02-13 10:33   ` Thomas Gleixner
2017-03-16  8:58   ` Auger Eric
2017-06-19 15:48     ` Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 16/33] irqchip/gic-v3-its: Add GICv4 ITS command definitions Marc Zyngier
2017-02-13 10:34   ` Thomas Gleixner
2017-03-16  8:58   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 17/33] irqchip/gic-v3-its: Add VLPI configuration hook Marc Zyngier
2017-02-13 10:37   ` Thomas Gleixner
2017-02-13 23:07   ` Shanker Donthineni
2017-06-19 14:52     ` Marc Zyngier
2017-03-16  8:59   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 18/33] irqchip/gic-v3-its: Add VLPI map/unmap operations Marc Zyngier
2017-03-16  8:59   ` Auger Eric
2017-06-19 13:08     ` Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 19/33] irqchip/gic-v3-its: Add VLPI configuration handling Marc Zyngier
2017-02-13 10:38   ` Thomas Gleixner
2017-03-16  8:59   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 20/33] irqchip/gic-v3-its: Add VPE domain infrastructure Marc Zyngier
2017-02-13 10:40   ` Thomas Gleixner
2017-06-19 13:54     ` Marc Zyngier
2017-03-16  9:18   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 21/33] irqchip/gic-v3-its: Add VPE irq domain allocation/teardown Marc Zyngier
2017-02-13 10:45   ` Thomas Gleixner
2017-02-13 23:25   ` Shanker Donthineni
2017-03-16  9:27   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 22/33] irqchip/gic-v3-its: Add VPE irq domain [de]activation Marc Zyngier
2017-02-13 10:45   ` Thomas Gleixner
2017-01-17 10:20 ` [RFC PATCH 23/33] irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors Marc Zyngier
2017-02-13 10:46   ` Thomas Gleixner
2017-02-13 23:39   ` Shanker Donthineni
2017-06-19 15:03     ` Marc Zyngier
2017-03-16 21:03   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 24/33] irqchip/gic-v3-its: Add VPE scheduling Marc Zyngier
2017-02-13 10:48   ` Thomas Gleixner
2017-02-14  0:13   ` Shanker Donthineni
2017-06-19 15:23     ` Marc Zyngier
2017-02-14  1:24   ` Shanker Donthineni
2017-03-16 21:23   ` Auger Eric
2017-03-16 21:41     ` Shanker Donthineni
2017-06-19  9:34       ` Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 25/33] irqchip/gic-v3-its: Add VPE invalidation hook Marc Zyngier
2017-02-13 10:48   ` Thomas Gleixner
2017-01-17 10:20 ` [RFC PATCH 26/33] irqchip/gic-v3-its: Add VPE affinity changes Marc Zyngier
2017-02-13 10:56   ` Thomas Gleixner
2017-01-17 10:20 ` [RFC PATCH 27/33] irqchip/gic-v3-its: Add VPE interrupt masking Marc Zyngier
2017-02-13 10:57   ` Thomas Gleixner
2017-03-16 21:58   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 28/33] irqchip/gic-v3-its: Support VPE doorbell invalidation even when !DirectLPI Marc Zyngier
2017-02-13 11:15   ` Thomas Gleixner
2017-02-14  0:44   ` Shanker Donthineni
2017-06-19 13:31     ` Marc Zyngier
2017-01-17 10:20 ` [RFC PATCH 29/33] irqchip/gic-v4: Add per-VM VPE domain creation Marc Zyngier
2017-02-13 11:16   ` Thomas Gleixner
2017-01-17 10:20 ` [RFC PATCH 30/33] irqchip/gic-v4: Add VPE command interface Marc Zyngier
2017-02-13 11:16   ` Thomas Gleixner
2017-03-16 21:17   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 31/33] irqchip/gic-v4: Add VLPI configuration interface Marc Zyngier
2017-02-13 11:17   ` Thomas Gleixner
2017-03-16 21:08   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 32/33] irqchip/gic-v4: Add some basic documentation Marc Zyngier
2017-02-13 11:17   ` Thomas Gleixner
2017-03-16 21:02   ` Auger Eric
2017-01-17 10:20 ` [RFC PATCH 33/33] irqchip/gic-v4: Enable low-level GICv4 operations Marc Zyngier
2017-02-13 11:17   ` Thomas Gleixner
2017-02-13 11:19 ` [RFC PATCH 00/33] irqchip: Core support for GICv4 Thomas Gleixner

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