Re: [PATCH V3 3/3] ufs: ufs-qcom: Enable QUnipro Internal Clock Gating

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 7/9/25 11:13 PM, Nitin Rawat wrote:
> 
> 
> On 7/9/2025 10:46 AM, Avri Altman wrote:
>>> Enable internal clock gating for QUnipro by setting the following attributes to 1
>>> during host controller initialization:
>>> - DL_VS_CLK_CFG
>>> - PA_VS_CLK_CFG_REG
>>> - DME_VS_CORE_CLK_CTRL.DME_HW_CGC_EN
>>>
>>> This change is necessary to support the internal clock gating mechanism in
>>> Qualcomm UFS host controller. This is power saving feature and hence driver
>>> can continue to function correctly despite any error in enabling these feature.
>> Does this change offloads clock gating?
>> i.e. no need to set UFSHCD_CAP_CLK_GATING ?
> No , this change does not offload sw based UFS clock gating. Host controller has its own internal clock gating mechanism

Does QUnipro == "the UFS controller found on Qualcomm platforms"?

If so, please use some version of the latter name to make it more
easily discernible 

Konrad