* [PATCH v4 1/4] selftests/resctrl: Fix a division by zero error on Hygon
2025-12-13 7:38 [PATCH v4 0/4] selftests/resctrl: Add Hygon CPUs support and bug fixes Xiaochen Shen
@ 2025-12-13 7:38 ` Xiaochen Shen
2025-12-13 7:38 ` [PATCH v4 2/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage Xiaochen Shen
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Xiaochen Shen @ 2025-12-13 7:38 UTC (permalink / raw)
To: tony.luck, reinette.chatre, bp, fenghuay, shuah, skhan
Cc: babu.moger, james.morse, Dave.Martin, x86, linux-kernel,
linux-kselftest, shenxiaochen
Commit
a1cd99e700ec ("selftests/resctrl: Adjust effective L3 cache size with SNC enabled")
introduced the snc_nodes_per_l3_cache() function to detect the Intel
Sub-NUMA Clustering (SNC) feature by comparing #CPUs in node0 with #CPUs
sharing LLC with CPU0. The function was designed to return:
(1) >1: SNC mode is enabled.
(2) 1: SNC mode is not enabled or not supported.
However, on certain Hygon CPUs, #CPUs sharing LLC with CPU0 is actually
less than #CPUs in node0. This results in snc_nodes_per_l3_cache()
returning 0 (calculated as cache_cpus / node_cpus).
This leads to a division by zero error in get_cache_size():
*cache_size /= snc_nodes_per_l3_cache();
Causing the resctrl selftest to fail with:
"Floating point exception (core dumped)"
Fix the issue by ensuring snc_nodes_per_l3_cache() returns 1 when SNC
mode is not supported on the platform.
Fixes: a1cd99e700ec ("selftests/resctrl: Adjust effective L3 cache size with SNC enabled")
Signed-off-by: Xiaochen Shen <shenxiaochen@open-hieco.net>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
---
tools/testing/selftests/resctrl/resctrlfs.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/tools/testing/selftests/resctrl/resctrlfs.c b/tools/testing/selftests/resctrl/resctrlfs.c
index 195f04c4d158..b9c1bfb6cc02 100644
--- a/tools/testing/selftests/resctrl/resctrlfs.c
+++ b/tools/testing/selftests/resctrl/resctrlfs.c
@@ -243,6 +243,16 @@ int snc_nodes_per_l3_cache(void)
}
snc_mode = cache_cpus / node_cpus;
+ /*
+ * On some platforms (e.g. Hygon),
+ * cache_cpus < node_cpus, the calculated snc_mode is 0.
+ *
+ * Set snc_mode = 1 to indicate that SNC mode is not
+ * supported on the platform.
+ */
+ if (!snc_mode)
+ snc_mode = 1;
+
if (snc_mode > 1)
ksft_print_msg("SNC-%d mode discovered.\n", snc_mode);
}
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v4 2/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage
2025-12-13 7:38 [PATCH v4 0/4] selftests/resctrl: Add Hygon CPUs support and bug fixes Xiaochen Shen
2025-12-13 7:38 ` [PATCH v4 1/4] selftests/resctrl: Fix a division by zero error on Hygon Xiaochen Shen
@ 2025-12-13 7:38 ` Xiaochen Shen
2025-12-16 23:26 ` Reinette Chatre
2025-12-13 7:38 ` [PATCH v4 3/4] selftests/resctrl: Add CPU vendor detection for Hygon Xiaochen Shen
2025-12-13 7:38 ` [PATCH v4 4/4] selftests/resctrl: Fix non-contiguous CBM check " Xiaochen Shen
3 siblings, 1 reply; 7+ messages in thread
From: Xiaochen Shen @ 2025-12-13 7:38 UTC (permalink / raw)
To: tony.luck, reinette.chatre, bp, fenghuay, shuah, skhan
Cc: babu.moger, james.morse, Dave.Martin, x86, linux-kernel,
linux-kselftest, shenxiaochen
The CPU vendor IDs are required to be unique bits because they're used
for vendor_specific bitmask in the struct resctrl_test.
Consider for example their usage in test_vendor_specific_check():
return get_vendor() & test->vendor_specific
However, the definitions of CPU vendor IDs in file resctrl.h is quite
subtle as a bitmask value:
#define ARCH_INTEL 1
#define ARCH_AMD 2
A clearer and more maintainable approach is to define these CPU vendor
IDs using BIT(). This ensures each vendor corresponds to a distinct bit
and makes it obvious when adding new vendor IDs.
Accordingly, update the return types of detect_vendor() and get_vendor()
from 'int' to 'unsigned int' to align with their usage as bitmask values
and to prevent potentially risky type conversions.
Furthermore, introduce a bool flag 'initialized' to simplify the
get_vendor() -> detect_vendor() logic. This ensures the vendor ID is
detected only once and resolves the ambiguity of using the same variable
'vendor' both as a value and as a state.
Suggested-by: Reinette Chatre <reinette.chatre@intel.com>
Suggested-by: Fenghua Yu <fenghuay@nvidia.com>
Signed-off-by: Xiaochen Shen <shenxiaochen@open-hieco.net>
---
tools/testing/selftests/resctrl/resctrl.h | 7 ++---
.../testing/selftests/resctrl/resctrl_tests.c | 26 +++++++++++++------
2 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
index 3c51bdac2dfa..4f9c7d04c98d 100644
--- a/tools/testing/selftests/resctrl/resctrl.h
+++ b/tools/testing/selftests/resctrl/resctrl.h
@@ -23,6 +23,7 @@
#include <asm/unistd.h>
#include <linux/perf_event.h>
#include <linux/compiler.h>
+#include <linux/bits.h>
#include "kselftest.h"
#define MB (1024 * 1024)
@@ -36,8 +37,8 @@
* Define as bits because they're used for vendor_specific bitmask in
* the struct resctrl_test.
*/
-#define ARCH_INTEL 1
-#define ARCH_AMD 2
+#define ARCH_INTEL BIT(0)
+#define ARCH_AMD BIT(1)
#define END_OF_TESTS 1
@@ -163,7 +164,7 @@ extern int snc_unreliable;
extern char llc_occup_path[1024];
int snc_nodes_per_l3_cache(void);
-int get_vendor(void);
+unsigned int get_vendor(void);
bool check_resctrlfs_support(void);
int filter_dmesg(void);
int get_domain_id(const char *resource, int cpu_no, int *domain_id);
diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c
index 5154ffd821c4..980ecf2bcf10 100644
--- a/tools/testing/selftests/resctrl/resctrl_tests.c
+++ b/tools/testing/selftests/resctrl/resctrl_tests.c
@@ -23,16 +23,24 @@ static struct resctrl_test *resctrl_tests[] = {
&l2_noncont_cat_test,
};
-static int detect_vendor(void)
+static unsigned int detect_vendor(void)
{
- FILE *inf = fopen("/proc/cpuinfo", "r");
- int vendor_id = 0;
+ FILE *inf;
+ static unsigned int vendor_id;
char *s = NULL;
char *res;
+ static bool initialized;
- if (!inf)
+ if (initialized)
return vendor_id;
+ inf = fopen("/proc/cpuinfo", "r");
+ if (!inf) {
+ vendor_id = 0;
+ initialized = true;
+ return vendor_id;
+ }
+
res = fgrep(inf, "vendor_id");
if (res)
@@ -45,15 +53,17 @@ static int detect_vendor(void)
fclose(inf);
free(res);
+
+ initialized = true;
return vendor_id;
}
-int get_vendor(void)
+unsigned int get_vendor(void)
{
- static int vendor = -1;
+ unsigned int vendor;
+
+ vendor = detect_vendor();
- if (vendor == -1)
- vendor = detect_vendor();
if (vendor == 0)
ksft_print_msg("Can not get vendor info...\n");
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v4 2/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage
2025-12-13 7:38 ` [PATCH v4 2/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage Xiaochen Shen
@ 2025-12-16 23:26 ` Reinette Chatre
2025-12-17 2:36 ` Xiaochen Shen
0 siblings, 1 reply; 7+ messages in thread
From: Reinette Chatre @ 2025-12-16 23:26 UTC (permalink / raw)
To: Xiaochen Shen, tony.luck, bp, fenghuay, shuah, skhan
Cc: babu.moger, james.morse, Dave.Martin, x86, linux-kernel, linux-kselftest
Hi Xiaochen,
On 12/12/25 11:38 PM, Xiaochen Shen wrote:
> diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c
> index 5154ffd821c4..980ecf2bcf10 100644
> --- a/tools/testing/selftests/resctrl/resctrl_tests.c
> +++ b/tools/testing/selftests/resctrl/resctrl_tests.c
> @@ -23,16 +23,24 @@ static struct resctrl_test *resctrl_tests[] = {
> &l2_noncont_cat_test,
> };
>
> -static int detect_vendor(void)
> +static unsigned int detect_vendor(void)
> {
> - FILE *inf = fopen("/proc/cpuinfo", "r");
> - int vendor_id = 0;
> + FILE *inf;
> + static unsigned int vendor_id;
> char *s = NULL;
> char *res;
> + static bool initialized;
>
The changelog incorrectly claims that this should now match reverse fir ordering.
To be "reverse fir" ordered the declarations should look like:
static unsigned int vendor_id;
static bool initialized;
char *s = NULL;
FILE *inf;
char *res;
With this fixed:
| Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Reinette
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v4 2/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage
2025-12-16 23:26 ` Reinette Chatre
@ 2025-12-17 2:36 ` Xiaochen Shen
0 siblings, 0 replies; 7+ messages in thread
From: Xiaochen Shen @ 2025-12-17 2:36 UTC (permalink / raw)
To: Reinette Chatre, tony.luck, bp, fenghuay, shuah, skhan
Cc: babu.moger, james.morse, Dave.Martin, x86, linux-kernel,
linux-kselftest, shenxiaochen
Hi Reinette,
On 12/17/2025 7:26 AM, Reinette Chatre wrote:
>> -static int detect_vendor(void)
>> +static unsigned int detect_vendor(void)
>> {
>> - FILE *inf = fopen("/proc/cpuinfo", "r");
>> - int vendor_id = 0;
>> + FILE *inf;
>> + static unsigned int vendor_id;
>> char *s = NULL;
>> char *res;
>> + static bool initialized;
>>
> The changelog incorrectly claims that this should now match reverse fir ordering.
> To be "reverse fir" ordered the declarations should look like:
>
> static unsigned int vendor_id;
> static bool initialized;
> char *s = NULL;
> FILE *inf;
> char *res;
Thank you! I will fix it on v5 patch.
>
>
> With this fixed:
> | Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Thank you!
Best regards,
Xiaochen Shen
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 3/4] selftests/resctrl: Add CPU vendor detection for Hygon
2025-12-13 7:38 [PATCH v4 0/4] selftests/resctrl: Add Hygon CPUs support and bug fixes Xiaochen Shen
2025-12-13 7:38 ` [PATCH v4 1/4] selftests/resctrl: Fix a division by zero error on Hygon Xiaochen Shen
2025-12-13 7:38 ` [PATCH v4 2/4] selftests/resctrl: Define CPU vendor IDs as bits to match usage Xiaochen Shen
@ 2025-12-13 7:38 ` Xiaochen Shen
2025-12-13 7:38 ` [PATCH v4 4/4] selftests/resctrl: Fix non-contiguous CBM check " Xiaochen Shen
3 siblings, 0 replies; 7+ messages in thread
From: Xiaochen Shen @ 2025-12-13 7:38 UTC (permalink / raw)
To: tony.luck, reinette.chatre, bp, fenghuay, shuah, skhan
Cc: babu.moger, james.morse, Dave.Martin, x86, linux-kernel,
linux-kselftest, shenxiaochen
The resctrl selftest currently fails on Hygon CPUs that support Platform
QoS features, printing the error:
"# Can not get vendor info..."
This occurs because vendor detection is missing for Hygon CPUs.
Fix this by extending the CPU vendor detection logic to include
Hygon's vendor ID.
Signed-off-by: Xiaochen Shen <shenxiaochen@open-hieco.net>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
---
tools/testing/selftests/resctrl/resctrl.h | 1 +
tools/testing/selftests/resctrl/resctrl_tests.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
index 4f9c7d04c98d..afe635b6e48d 100644
--- a/tools/testing/selftests/resctrl/resctrl.h
+++ b/tools/testing/selftests/resctrl/resctrl.h
@@ -39,6 +39,7 @@
*/
#define ARCH_INTEL BIT(0)
#define ARCH_AMD BIT(1)
+#define ARCH_HYGON BIT(2)
#define END_OF_TESTS 1
diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c
index 980ecf2bcf10..78626bbae976 100644
--- a/tools/testing/selftests/resctrl/resctrl_tests.c
+++ b/tools/testing/selftests/resctrl/resctrl_tests.c
@@ -50,6 +50,8 @@ static unsigned int detect_vendor(void)
vendor_id = ARCH_INTEL;
else if (s && !strcmp(s, ": AuthenticAMD\n"))
vendor_id = ARCH_AMD;
+ else if (s && !strcmp(s, ": HygonGenuine\n"))
+ vendor_id = ARCH_HYGON;
fclose(inf);
free(res);
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 4/4] selftests/resctrl: Fix non-contiguous CBM check for Hygon
2025-12-13 7:38 [PATCH v4 0/4] selftests/resctrl: Add Hygon CPUs support and bug fixes Xiaochen Shen
` (2 preceding siblings ...)
2025-12-13 7:38 ` [PATCH v4 3/4] selftests/resctrl: Add CPU vendor detection for Hygon Xiaochen Shen
@ 2025-12-13 7:38 ` Xiaochen Shen
3 siblings, 0 replies; 7+ messages in thread
From: Xiaochen Shen @ 2025-12-13 7:38 UTC (permalink / raw)
To: tony.luck, reinette.chatre, bp, fenghuay, shuah, skhan
Cc: babu.moger, james.morse, Dave.Martin, x86, linux-kernel,
linux-kselftest, shenxiaochen
The resctrl selftest currently fails on Hygon CPUs that always supports
non-contiguous CBM, printing the error:
"# Hardware and kernel differ on non-contiguous CBM support!"
This occurs because the arch_supports_noncont_cat() function lacks
vendor detection for Hygon CPUs, preventing proper identification of
their non-contiguous CBM capability.
Fix this by adding Hygon vendor ID detection to
arch_supports_noncont_cat().
Signed-off-by: Xiaochen Shen <shenxiaochen@open-hieco.net>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
---
tools/testing/selftests/resctrl/cat_test.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
index 94cfdba5308d..f00b622c1460 100644
--- a/tools/testing/selftests/resctrl/cat_test.c
+++ b/tools/testing/selftests/resctrl/cat_test.c
@@ -290,8 +290,10 @@ static int cat_run_test(const struct resctrl_test *test, const struct user_param
static bool arch_supports_noncont_cat(const struct resctrl_test *test)
{
- /* AMD always supports non-contiguous CBM. */
- if (get_vendor() == ARCH_AMD)
+ unsigned int vendor_id = get_vendor();
+
+ /* AMD and Hygon always support non-contiguous CBM. */
+ if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON)
return true;
#if defined(__i386__) || defined(__x86_64__) /* arch */
--
2.47.3
^ permalink raw reply [flat|nested] 7+ messages in thread