From: Baolu Lu <baolu.lu@linux.intel.com>
To: Vasant Hegde <vasant.hegde@amd.com>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Kevin Tian <kevin.tian@intel.com>,
Yi Liu <yi.l.liu@intel.com>
Cc: baolu.lu@linux.intel.com, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] iommu/vt-d: Move PCI PASID enablement to probe path
Date: Fri, 16 Aug 2024 21:09:04 +0800 [thread overview]
Message-ID: <92b55591-e106-4366-ba5b-0588af50770f@linux.intel.com> (raw)
In-Reply-To: <6650ce02-ac85-4cb6-941c-cc7e8b6effc4@amd.com>
On 2024/8/16 20:16, Vasant Hegde wrote:
> On 8/16/2024 4:19 PM, Lu Baolu wrote:
>> Currently, PCI PASID is enabled alongside PCI ATS when an iommu domain is
>> attached to the device and disabled when the device transitions to block
>> translation mode. This approach is inappropriate as PCI PASID is a device
>> feature independent of the type of the attached domain.
> Reading through other thread, I thought we want to enable both PASID and PRI in
> device probe path. Did I miss something?
PRI is different. PRI should be enabled when the first iopf-capable
domain is attached to device or its PASID, and disabled when the last
such domain is detached.
Thanks,
baolu
next prev parent reply other threads:[~2024-08-16 13:09 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-16 10:49 Lu Baolu
2024-08-16 12:16 ` Vasant Hegde
2024-08-16 13:09 ` Baolu Lu [this message]
2024-08-16 13:31 ` Jason Gunthorpe
2024-08-19 6:34 ` Vasant Hegde
2024-08-19 7:09 ` Baolu Lu
2024-08-19 7:11 ` Baolu Lu
2024-08-19 12:34 ` Jason Gunthorpe
2024-08-20 4:10 ` Baolu Lu
2024-08-20 8:30 ` Vasant Hegde
2024-08-20 8:55 ` Yi Liu
2024-08-20 13:52 ` Jason Gunthorpe
2024-08-20 13:51 ` Jason Gunthorpe
2024-08-26 9:11 ` Vasant Hegde
2024-08-19 7:32 ` Yi Liu
2024-08-19 3:14 ` Yi Liu
2024-08-19 3:34 ` Baolu Lu
2024-08-19 4:51 ` Yi Liu
2024-08-19 5:15 ` Baolu Lu
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