[PATCH v4 0/2] Add SPI support for IPQ5424

[PATCH v4 0/2] Add SPI support for IPQ5424

[Manikanta Mylavarapu]

Add SPI nodes to the IPQ5424 device tree and update the
GPIO pin mappings accordingly.

Changes in V4:
	- Drop patches #1 to #4 of V3 due to the reversion of the
	  'renaming of spi0 to spi4' and adhere to the existing
	  naming convention such as spi0 and spi1.
	- Add spi1 node.
	- Detailed change logs are added to the respective patches.

V3 can be found at:
https://lore.kernel.org/linux-arm-msm/20241227072446.2545148-1-quic_mmanikan@quicinc.com/

V2 can be found at:
https://lore.kernel.org/linux-arm-msm/20241217091308.3253897-1-quic_mmanikan@quicinc.com/

V1 can be found at:
https://lore.kernel.org/linux-arm-msm/20241122124505.1688436-1-quic_mmanikan@quicinc.com/

Manikanta Mylavarapu (2):
  arm64: dts: qcom: ipq5424: add spi nodes
  arm64: dts: qcom: ipq5424: configure spi0 node for rdp466

 arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++
 arch/arm64/boot/dts/qcom/ipq5424.dtsi       | 22 +++++++++++
 2 files changed, 65 insertions(+)


base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2
-- 
2.34.1

[PATCH v4 1/2] arm64: dts: qcom: ipq5424: add spi nodes

[Manikanta Mylavarapu]

Serial engines 4 and 5 on the IPQ5424 support SPI. Serial engine 4 is
exclusively dedicated to SPI, whereas serial engine 5 is firmware based
and supports SPI, I2C, and UART.

The SPI instance operates on serial engine 4, designated as spi0, and on
serial engine 5, designated as spi1. Add both the spi0 and spi1 nodes.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
---
Changes in V4:
	- Revert the 'renaming of spi0 to spi4' and follow the existing
	  naming convention such as spi0 and spi1.
	- Update commit message.
	- Add spi1 node. 

 arch/arm64/boot/dts/qcom/ipq5424.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index 5e219f900412..5ad250c77a1d 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -201,6 +201,28 @@ uart1: serial@1a84000 {
 				clock-names = "se";
 				interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
+			spi0: spi@1a90000 {
+				compatible = "qcom,geni-spi";
+				reg = <0 0x01a90000 0 0x4000>;
+				clocks = <&gcc GCC_QUPV3_SPI0_CLK>;
+				clock-names = "se";
+				interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			spi1: spi@1a94000 {
+				compatible = "qcom,geni-spi";
+				reg = <0 0x01a94000 0 0x4000>;
+				clocks = <&gcc GCC_QUPV3_SPI1_CLK>;
+				clock-names = "se";
+				interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		sdhc: mmc@7804000 {
-- 
2.34.1

[PATCH v4 2/2] arm64: dts: qcom: ipq5424: configure spi0 node for rdp466

[Manikanta Mylavarapu]

Enable the SPI0 node and configure the associated gpio pins.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
---
Changes in V4:
	- Revert the 'renaming of spi0 to spi4' and follow the existing
	  naming convention such as spi0 and spi1.
	- Update commit message.

 arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index d4d31026a026..60cfa8708eb4 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -23,6 +23,36 @@ &sleep_clk {
 };
 
 &tlmm {
+	spi0_default_state: spi0-default-state {
+		clk-pins {
+			pins = "gpio6";
+			function = "spi0_clk";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		cs-pins {
+			pins = "gpio7";
+			function = "spi0_cs";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		miso-pins {
+			pins = "gpio8";
+			function = "spi0_miso";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		mosi-pins {
+			pins = "gpio9";
+			function = "spi0_mosi";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
 	sdc_default_state: sdc-default-state {
 		clk-pins {
 			pins = "gpio5";
@@ -57,3 +87,16 @@ &xo_board {
 	clock-frequency = <24000000>;
 };
 
+&spi0 {
+	pinctrl-0 = <&spi0_default_state>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	flash@0 {
+		compatible = "micron,n25q128a11", "jedec,spi-nor";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <50000000>;
+	};
+};
-- 
2.34.1

Re: [PATCH v4 1/2] arm64: dts: qcom: ipq5424: add spi nodes

[Konrad Dybcio]

On 3.01.2025 7:37 AM, Manikanta Mylavarapu wrote:
> Serial engines 4 and 5 on the IPQ5424 support SPI. Serial engine 4 is
> exclusively dedicated to SPI, whereas serial engine 5 is firmware based
> and supports SPI, I2C, and UART.
> 
> The SPI instance operates on serial engine 4, designated as spi0, and on
> serial engine 5, designated as spi1. Add both the spi0 and spi1 nodes.
> 
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH v4 2/2] arm64: dts: qcom: ipq5424: configure spi0 node for rdp466

[Konrad Dybcio]

On 3.01.2025 7:37 AM, Manikanta Mylavarapu wrote:
> Enable the SPI0 node and configure the associated gpio pins.
> 
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---
> Changes in V4:
> 	- Revert the 'renaming of spi0 to spi4' and follow the existing
> 	  naming convention such as spi0 and spi1.
> 	- Update commit message.
> 
>  arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++
>  1 file changed, 43 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> index d4d31026a026..60cfa8708eb4 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
> @@ -23,6 +23,36 @@ &sleep_clk {
>  };
>  
>  &tlmm {
> +	spi0_default_state: spi0-default-state {
> +		clk-pins {
> +			pins = "gpio6";
> +			function = "spi0_clk";
> +			drive-strength = <8>;
> +			bias-pull-down;
> +		};
> +
> +		cs-pins {
> +			pins = "gpio7";
> +			function = "spi0_cs";
> +			drive-strength = <8>;
> +			bias-pull-up;
> +		};
> +
> +		miso-pins {
> +			pins = "gpio8";
> +			function = "spi0_miso";
> +			drive-strength = <8>;
> +			bias-pull-down;
> +		};
> +
> +		mosi-pins {
> +			pins = "gpio9";
> +			function = "spi0_mosi";
> +			drive-strength = <8>;
> +			bias-pull-down;
> +		};
> +	};
> +
>  	sdc_default_state: sdc-default-state {
>  		clk-pins {
>  			pins = "gpio5";
> @@ -57,3 +87,16 @@ &xo_board {
>  	clock-frequency = <24000000>;
>  };
>  
> +&spi0 {

's' < 't', please re-sort this alphabetically

Konrad

Re: [PATCH v4 0/2] Add SPI support for IPQ5424

[Bjorn Andersson]

On Fri, 03 Jan 2025 12:07:06 +0530, Manikanta Mylavarapu wrote:
> Add SPI nodes to the IPQ5424 device tree and update the
> GPIO pin mappings accordingly.
> 
> Changes in V4:
> 	- Drop patches #1 to #4 of V3 due to the reversion of the
> 	  'renaming of spi0 to spi4' and adhere to the existing
> 	  naming convention such as spi0 and spi1.
> 	- Add spi1 node.
> 	- Detailed change logs are added to the respective patches.
> 
> [...]

Applied, thanks!

[1/2] arm64: dts: qcom: ipq5424: add spi nodes
      commit: 524ba3abe726fd7207f1d187429f7ce552d6758e
[2/2] arm64: dts: qcom: ipq5424: configure spi0 node for rdp466
      commit: 70c325ef6c979e5308edd7ef04077ceb6659d340

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>