[PATCH 0/4] watchdog: loongson1: Add Loongson-7A watchdog support

[PATCH 0/4] watchdog: loongson1: Add Loongson-7A watchdog support

[Rong Zhang]

The Loongson-7A watchdog is similar to Loongson 2K0300, except that it
has no clock controller.

Add "loongson,ls7a-wdt" compatible as well as a conditionally required
field clock-frequency. The driver will retrieve clock frequency from OF
to make it work.

With these, add a watchdog node to the LS7A PCH dtsi to wire it up, and
enable LOONGSON1_WDT in defconfig to make it work by default.

Tested on Loongson-LS3A4000-7A1000-NUC-SE and Lenovo KaiTian M530Z.

Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
---
Rong Zhang (4):
      dt-bindings: watchdog: loongson,ls1x-wdt: Add ls7a-wdt compatible
      watchdog: loongson1: Add Loongson-7A watchdog support
      MIPS: Loongson64: Add watchdog node for LS7A PCH
      MIPS: loongson3_defconfig: Enable LOONGSON1_WDT by default

 .../bindings/watchdog/loongson,ls1x-wdt.yaml       | 31 ++++++++++++-
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi          |  6 +++
 arch/mips/configs/loongson3_defconfig              | 54 ++++------------------
 drivers/watchdog/loongson1_wdt.c                   | 29 ++++++++++--
 4 files changed, 70 insertions(+), 50 deletions(-)
---
base-commit: 7475ea8b58616b33c04afb976cf0fbaad9dd63fb
change-id: 664fad58-mips-ls7a-wdt-1e614643b33d

Thanks,
Rong

[PATCH 1/4] dt-bindings: watchdog: loongson,ls1x-wdt: Add ls7a-wdt compatible

[Rong Zhang]

The Loongson-7A has a watchdog, which is similar to Loongson 2K0300,
except that it has no clock controller.

Add "loongson,ls7a-wdt" compatible as well as a conditionally required
field clock-frequency.

Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
---
 .../bindings/watchdog/loongson,ls1x-wdt.yaml       | 31 +++++++++++++++++++++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/watchdog/loongson,ls1x-wdt.yaml b/Documentation/devicetree/bindings/watchdog/loongson,ls1x-wdt.yaml
index 50a9b468c4a3..cb93e9578f82 100644
--- a/Documentation/devicetree/bindings/watchdog/loongson,ls1x-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/loongson,ls1x-wdt.yaml
@@ -18,6 +18,7 @@ properties:
       - loongson,ls1b-wdt
       - loongson,ls1c-wdt
       - loongson,ls2k0300-wdt
+      - loongson,ls7a-wdt
 
   reg:
     maxItems: 1
@@ -25,13 +26,34 @@ properties:
   clocks:
     maxItems: 1
 
+  clock-frequency:
+    description: Frequency of clock in Hz
+
 required:
   - compatible
   - reg
-  - clocks
 
 unevaluatedProperties: false
 
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - loongson,ls7a-wdt
+
+then:
+  properties:
+    clocks: false
+  required:
+    - clock-frequency
+
+else:
+  properties:
+    clock-frequency: false
+  required:
+    - clocks
+
 examples:
   - |
     #include <dt-bindings/clock/loongson,ls1x-clk.h>
@@ -41,3 +63,10 @@ examples:
 
         clocks = <&clkc LS1X_CLKID_APB>;
     };
+
+  - |
+    watchdog@100d0030 {
+        compatible = "loongson,ls7a-wdt";
+        reg = <0x100d0030 0xc>;
+        clock-frequency = <50000000>;
+    };

-- 
2.55.0

[PATCH 2/4] watchdog: loongson1: Add Loongson-7A watchdog support

[Rong Zhang]

The Loongson-7A watchdog is similar to Loongson 2K0300, except that it
has no clock controller.

Retrieve clock frequency from OF to make it work.

Tested on Loongson-LS3A4000-7A1000-NUC-SE and Lenovo KaiTian M530Z.

Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
---
 drivers/watchdog/loongson1_wdt.c | 29 +++++++++++++++++++++++++----
 1 file changed, 25 insertions(+), 4 deletions(-)

diff --git a/drivers/watchdog/loongson1_wdt.c b/drivers/watchdog/loongson1_wdt.c
index 2811e7eab631..57b9e699c131 100644
--- a/drivers/watchdog/loongson1_wdt.c
+++ b/drivers/watchdog/loongson1_wdt.c
@@ -31,6 +31,7 @@ struct ls1x_wdt_pdata {
 	u32 timer_offset;
 	u32 set_offset;
 	u32 wdt_en_bit;
+	bool no_clk;
 };
 
 static const struct ls1x_wdt_pdata ls1b_wdt_pdata = {
@@ -45,6 +46,13 @@ static const struct ls1x_wdt_pdata ls2k0300_wdt_pdata = {
 	.wdt_en_bit = BIT(1),
 };
 
+static const struct ls1x_wdt_pdata ls7a_wdt_pdata = {
+	.timer_offset = 0x8,
+	.set_offset = 0x4,
+	.wdt_en_bit = BIT(1),
+	.no_clk = true,
+};
+
 struct ls1x_wdt_drvdata {
 	void __iomem *base;
 	struct clk *clk;
@@ -129,6 +137,8 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
 	struct ls1x_wdt_drvdata *drvdata;
 	struct watchdog_device *ls1x_wdt;
 	unsigned long clk_rate;
+	u32 freq;
+	int ret;
 
 	drvdata = devm_kzalloc_obj(dev, *drvdata);
 	if (!drvdata)
@@ -136,16 +146,26 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, drvdata);
 
 	drvdata->pdata = of_device_get_match_data(dev);
+	if (!drvdata->pdata)
+		return -ENODEV;
 
 	drvdata->base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(drvdata->base))
 		return PTR_ERR(drvdata->base);
 
-	drvdata->clk = devm_clk_get_enabled(dev, NULL);
-	if (IS_ERR(drvdata->clk))
-		return PTR_ERR(drvdata->clk);
+	if (drvdata->pdata->no_clk) {
+		ret = of_property_read_u32(dev->of_node, "clock-frequency", &freq);
+		if (ret)
+			return ret;
+
+		clk_rate = freq;
+	} else {
+		drvdata->clk = devm_clk_get_enabled(dev, NULL);
+		if (IS_ERR(drvdata->clk))
+			return PTR_ERR(drvdata->clk);
 
-	clk_rate = clk_get_rate(drvdata->clk);
+		clk_rate = clk_get_rate(drvdata->clk);
+	}
 	if (!clk_rate)
 		return -EINVAL;
 	drvdata->clk_rate = clk_rate;
@@ -191,6 +211,7 @@ static const struct of_device_id ls1x_wdt_dt_ids[] = {
 	{ .compatible = "loongson,ls1b-wdt", .data = &ls1b_wdt_pdata },
 	{ .compatible = "loongson,ls1c-wdt", .data = &ls1b_wdt_pdata },
 	{ .compatible = "loongson,ls2k0300-wdt", .data = &ls2k0300_wdt_pdata },
+	{ .compatible = "loongson,ls7a-wdt", .data = &ls7a_wdt_pdata },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, ls1x_wdt_dt_ids);

-- 
2.55.0

[PATCH 3/4] MIPS: Loongson64: Add watchdog node for LS7A PCH

[Rong Zhang]

The Loongson-7A has a watchdog. With proper support added to the
loongson1_wdt driver, wire it up by adding a watchdog node to
ls7a-pch.dtsi.

Tested on Loongson-LS3A4000-7A1000-NUC-SE and Lenovo KaiTian M530Z.

Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
---
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index f304f99946f1..770c96e9b908 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -67,6 +67,12 @@ ls7a_uart3: serial@10080300 {
 			no-loopback-test;
 		};
 
+		watchdog: watchdog@100d0030 {
+			compatible = "loongson,ls7a-wdt";
+			reg = <0 0x100d0030 0 0xc>;
+			clock-frequency = <50000000>;
+		};
+
 		rtc0: rtc@100d0100 {
 			compatible = "loongson,ls7a-rtc";
 			reg = <0 0x100d0100 0 0x78>;

-- 
2.55.0

[PATCH 4/4] MIPS: loongson3_defconfig: Enable LOONGSON1_WDT by default

[Rong Zhang]

The Loongson-7A has a watchdog. With proper support added to the
loongson1_wdt driver and a relevant node added to ls7a-pch.dtsi, enable
LOONGSON1_WDT in defconfig to make it work by default.

This basically mirrors commit 5e73ad3ffceb ("MIPS: Loongson1: Add
watchdog support for Loongson1 board") except that the driver is built
as a module, since some LOONGSON64 platforms are not LS7A-based.

The defconfig file is also refreshed.

Tested on Loongson-LS3A4000-7A1000-NUC-SE and Lenovo KaiTian M530Z.

Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
---
 arch/mips/configs/loongson3_defconfig | 54 ++++++-----------------------------
 1 file changed, 9 insertions(+), 45 deletions(-)

diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig
index 12cb1a6a1360..00c591f21938 100644
--- a/arch/mips/configs/loongson3_defconfig
+++ b/arch/mips/configs/loongson3_defconfig
@@ -66,7 +66,6 @@ CONFIG_NF_CONNTRACK_SNMP=m
 CONFIG_NF_TABLES=m
 CONFIG_NFT_CT=m
 CONFIG_NFT_NAT=m
-CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
 CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
 CONFIG_NETFILTER_XT_TARGET_MARK=m
 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
@@ -91,33 +90,11 @@ CONFIG_NF_TABLES_ARP=y
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_RPFILTER=m
 CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_SECURITY=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
 CONFIG_NF_TABLES_IPV6=y
 CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_RPFILTER=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_IP6_NF_SECURITY=m
-CONFIG_IP6_NF_NAT=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
 CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_BRIDGE_NF_EBTABLES=m
-CONFIG_BRIDGE_EBT_T_FILTER=m
-CONFIG_BRIDGE_EBT_T_NAT=m
 CONFIG_IP_SCTP=m
 CONFIG_L2TP=m
 CONFIG_BRIDGE=m
@@ -189,7 +166,6 @@ CONFIG_VIRTIO_NET=m
 # CONFIG_NET_VENDOR_ATHEROS is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
 # CONFIG_NET_VENDOR_CISCO is not set
 # CONFIG_NET_VENDOR_DEC is not set
 # CONFIG_NET_VENDOR_DLINK is not set
@@ -250,9 +226,9 @@ CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=16
 CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_NONSTANDARD=y
 CONFIG_VIRTIO_CONSOLE=y
@@ -263,11 +239,14 @@ CONFIG_GPIO_LOONGSON=y
 CONFIG_SENSORS_LM75=m
 CONFIG_SENSORS_LM93=m
 CONFIG_SENSORS_W83627HF=m
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WATCHDOG_SYSFS=y
+CONFIG_LOONGSON1_WDT=m
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=m
 CONFIG_DRM=y
-CONFIG_DRM_RADEON=m
 CONFIG_DRM_AMDGPU=m
 CONFIG_DRM_AMDGPU_SI=y
 CONFIG_DRM_AMDGPU_CIK=y
@@ -276,6 +255,7 @@ CONFIG_DRM_AMD_ACP=y
 CONFIG_DRM_AMD_DC_SI=y
 CONFIG_DRM_AST=m
 CONFIG_DRM_QXL=y
+CONFIG_DRM_RADEON=m
 CONFIG_DRM_VIRTIO_GPU=y
 CONFIG_FB=y
 CONFIG_FB_RADEON=y
@@ -288,27 +268,12 @@ CONFIG_SND=m
 CONFIG_SND_SEQUENCER=m
 CONFIG_SND_SEQ_DUMMY=m
 # CONFIG_SND_ISA is not set
-CONFIG_SND_HDA_INTEL=m
 CONFIG_SND_HDA_PATCH_LOADER=y
-CONFIG_SND_HDA_CODEC_REALTEK=m
-CONFIG_SND_HDA_CODEC_REALTEK_LIB=m
-CONFIG_SND_HDA_CODEC_ALC260=m
-CONFIG_SND_HDA_CODEC_ALC262=m
-CONFIG_SND_HDA_CODEC_ALC268=m
-CONFIG_SND_HDA_CODEC_ALC269=m
-CONFIG_SND_HDA_CODEC_ALC662=m
-CONFIG_SND_HDA_CODEC_ALC680=m
-CONFIG_SND_HDA_CODEC_ALC861=m
-CONFIG_SND_HDA_CODEC_ALC861VD=m
-CONFIG_SND_HDA_CODEC_ALC880=m
-CONFIG_SND_HDA_CODEC_ALC882=m
+CONFIG_SND_HDA_INTEL=m
 CONFIG_SND_HDA_CODEC_SIGMATEL=m
-CONFIG_SND_HDA_CODEC_HDMI=m
-CONFIG_SND_HDA_CODEC_HDMI_GENERIC=m
-CONFIG_SND_HDA_CODEC_HDMI_INTEL=m
-CONFIG_SND_HDA_CODEC_HDMI_ATI=m
-CONFIG_SND_HDA_CODEC_HDMI_NVIDIA=m
 CONFIG_SND_HDA_CODEC_CONEXANT=m
+CONFIG_SND_HDA_CODEC_REALTEK=m
+CONFIG_SND_HDA_CODEC_HDMI=m
 # CONFIG_SND_USB is not set
 CONFIG_HIDRAW=y
 CONFIG_HID_A4TECH=m
@@ -406,7 +371,6 @@ CONFIG_PRINTK_TIME=y
 CONFIG_STRIP_ASM_SYMS=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
 CONFIG_FUNCTION_TRACER=y
 CONFIG_FTRACE_SYSCALLS=y
 CONFIG_CMDLINE_BOOL=y

-- 
2.55.0

Re: [PATCH 2/4] watchdog: loongson1: Add Loongson-7A watchdog support

[Guenter Roeck]

On 11/9/26 23:02, Rong Zhang wrote:
> The Loongson-7A watchdog is similar to Loongson 2K0300, except that it
> has no clock controller.
> 
> Retrieve clock frequency from OF to make it work.
> 
> Tested on Loongson-LS3A4000-7A1000-NUC-SE and Lenovo KaiTian M530Z.
> 
> Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
> ---
>   drivers/watchdog/loongson1_wdt.c | 29 +++++++++++++++++++++++++----
>   1 file changed, 25 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/watchdog/loongson1_wdt.c b/drivers/watchdog/loongson1_wdt.c
> index 2811e7eab631..57b9e699c131 100644
> --- a/drivers/watchdog/loongson1_wdt.c
> +++ b/drivers/watchdog/loongson1_wdt.c
> @@ -31,6 +31,7 @@ struct ls1x_wdt_pdata {
>   	u32 timer_offset;
>   	u32 set_offset;
>   	u32 wdt_en_bit;
> +	bool no_clk;
>   };
>   
>   static const struct ls1x_wdt_pdata ls1b_wdt_pdata = {
> @@ -45,6 +46,13 @@ static const struct ls1x_wdt_pdata ls2k0300_wdt_pdata = {
>   	.wdt_en_bit = BIT(1),
>   };
>   
> +static const struct ls1x_wdt_pdata ls7a_wdt_pdata = {
> +	.timer_offset = 0x8,
> +	.set_offset = 0x4,
> +	.wdt_en_bit = BIT(1),
> +	.no_clk = true,
> +};
> +
>   struct ls1x_wdt_drvdata {
>   	void __iomem *base;
>   	struct clk *clk;
> @@ -129,6 +137,8 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
>   	struct ls1x_wdt_drvdata *drvdata;
>   	struct watchdog_device *ls1x_wdt;
>   	unsigned long clk_rate;
> +	u32 freq;
> +	int ret;
>   
>   	drvdata = devm_kzalloc_obj(dev, *drvdata);
>   	if (!drvdata)
> @@ -136,16 +146,26 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
>   	platform_set_drvdata(pdev, drvdata);
>   
>   	drvdata->pdata = of_device_get_match_data(dev);
> +	if (!drvdata->pdata)
> +		return -ENODEV;
>   
>   	drvdata->base = devm_platform_ioremap_resource(pdev, 0);
>   	if (IS_ERR(drvdata->base))
>   		return PTR_ERR(drvdata->base);
>   
> -	drvdata->clk = devm_clk_get_enabled(dev, NULL);
> -	if (IS_ERR(drvdata->clk))
> -		return PTR_ERR(drvdata->clk);
> +	if (drvdata->pdata->no_clk) {
> +		ret = of_property_read_u32(dev->of_node, "clock-frequency", &freq);
> +		if (ret)
> +			return ret;
> +
> +		clk_rate = freq;
> +	} else {
> +		drvdata->clk = devm_clk_get_enabled(dev, NULL);
> +		if (IS_ERR(drvdata->clk))
> +			return PTR_ERR(drvdata->clk);
>   

Wouldn't it be much easier to just create a fixed rate clock and use it
(as suggested by Sashiko in the devicetree patch) ?

Guenter

> -	clk_rate = clk_get_rate(drvdata->clk);
> +		clk_rate = clk_get_rate(drvdata->clk);
> +	}
>   	if (!clk_rate)
>   		return -EINVAL;
>   	drvdata->clk_rate = clk_rate;
> @@ -191,6 +211,7 @@ static const struct of_device_id ls1x_wdt_dt_ids[] = {
>   	{ .compatible = "loongson,ls1b-wdt", .data = &ls1b_wdt_pdata },
>   	{ .compatible = "loongson,ls1c-wdt", .data = &ls1b_wdt_pdata },
>   	{ .compatible = "loongson,ls2k0300-wdt", .data = &ls2k0300_wdt_pdata },
> +	{ .compatible = "loongson,ls7a-wdt", .data = &ls7a_wdt_pdata },
>   	{ /* sentinel */ }
>   };
>   MODULE_DEVICE_TABLE(of, ls1x_wdt_dt_ids);
> 

Re: [PATCH 2/4] watchdog: loongson1: Add Loongson-7A watchdog support

[Rong Zhang]

Hi Guenter,

On Mon, 2026-11-09 at 23:47 -0800, Guenter Roeck wrote:
> On 11/9/26 23:02, Rong Zhang wrote:
> > The Loongson-7A watchdog is similar to Loongson 2K0300, except that it
> > has no clock controller.
> > 
> > Retrieve clock frequency from OF to make it work.
> > 
> > Tested on Loongson-LS3A4000-7A1000-NUC-SE and Lenovo KaiTian M530Z.
> > 
> > Signed-off-by: Rong Zhang <rongrong@oss.cipunited.com>
> > ---
> >   drivers/watchdog/loongson1_wdt.c | 29 +++++++++++++++++++++++++----
> >   1 file changed, 25 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/watchdog/loongson1_wdt.c b/drivers/watchdog/loongson1_wdt.c
> > index 2811e7eab631..57b9e699c131 100644
> > --- a/drivers/watchdog/loongson1_wdt.c
> > +++ b/drivers/watchdog/loongson1_wdt.c
> > @@ -31,6 +31,7 @@ struct ls1x_wdt_pdata {
> >   	u32 timer_offset;
> >   	u32 set_offset;
> >   	u32 wdt_en_bit;
> > +	bool no_clk;
> >   };
> >   
> >   static const struct ls1x_wdt_pdata ls1b_wdt_pdata = {
> > @@ -45,6 +46,13 @@ static const struct ls1x_wdt_pdata ls2k0300_wdt_pdata = {
> >   	.wdt_en_bit = BIT(1),
> >   };
> >   
> > +static const struct ls1x_wdt_pdata ls7a_wdt_pdata = {
> > +	.timer_offset = 0x8,
> > +	.set_offset = 0x4,
> > +	.wdt_en_bit = BIT(1),
> > +	.no_clk = true,
> > +};
> > +
> >   struct ls1x_wdt_drvdata {
> >   	void __iomem *base;
> >   	struct clk *clk;
> > @@ -129,6 +137,8 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
> >   	struct ls1x_wdt_drvdata *drvdata;
> >   	struct watchdog_device *ls1x_wdt;
> >   	unsigned long clk_rate;
> > +	u32 freq;
> > +	int ret;
> >   
> >   	drvdata = devm_kzalloc_obj(dev, *drvdata);
> >   	if (!drvdata)
> > @@ -136,16 +146,26 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
> >   	platform_set_drvdata(pdev, drvdata);
> >   
> >   	drvdata->pdata = of_device_get_match_data(dev);
> > +	if (!drvdata->pdata)
> > +		return -ENODEV;
> >   
> >   	drvdata->base = devm_platform_ioremap_resource(pdev, 0);
> >   	if (IS_ERR(drvdata->base))
> >   		return PTR_ERR(drvdata->base);
> >   
> > -	drvdata->clk = devm_clk_get_enabled(dev, NULL);
> > -	if (IS_ERR(drvdata->clk))
> > -		return PTR_ERR(drvdata->clk);
> > +	if (drvdata->pdata->no_clk) {
> > +		ret = of_property_read_u32(dev->of_node, "clock-frequency", &freq);
> > +		if (ret)
> > +			return ret;
> > +
> > +		clk_rate = freq;
> > +	} else {
> > +		drvdata->clk = devm_clk_get_enabled(dev, NULL);
> > +		if (IS_ERR(drvdata->clk))
> > +			return PTR_ERR(drvdata->clk);
> >   
> 
> Wouldn't it be much easier to just create a fixed rate clock and use it
> (as suggested by Sashiko in the devicetree patch) ?

Makes sense. I will take that approach (and fix other concerns found by
Sashiko) when I resubmit this.

Thanks,
Rong

> 
> Guenter
> 
> > -	clk_rate = clk_get_rate(drvdata->clk);
> > +		clk_rate = clk_get_rate(drvdata->clk);
> > +	}
> >   	if (!clk_rate)
> >   		return -EINVAL;
> >   	drvdata->clk_rate = clk_rate;
> > @@ -191,6 +211,7 @@ static const struct of_device_id ls1x_wdt_dt_ids[] = {
> >   	{ .compatible = "loongson,ls1b-wdt", .data = &ls1b_wdt_pdata },
> >   	{ .compatible = "loongson,ls1c-wdt", .data = &ls1b_wdt_pdata },
> >   	{ .compatible = "loongson,ls2k0300-wdt", .data = &ls2k0300_wdt_pdata },
> > +	{ .compatible = "loongson,ls7a-wdt", .data = &ls7a_wdt_pdata },
> >   	{ /* sentinel */ }
> >   };
> >   MODULE_DEVICE_TABLE(of, ls1x_wdt_dt_ids);
> >