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From: Marek Vasut <marex@nabladev.com>
To: Folker Schwesinger <dev@folker-schwesinger.de>,
	Rahul Navale <rahulnavale04@gmail.com>
Cc: Rahul Navale <rahul.navale@ifm.com>,
	dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, vkoul@kernel.org,
	Frank.Li@kernel.org, michal.simek@amd.com, suraj.gupta2@amd.com,
	thomas.gessler@brueckmann-gmbh.de, radhey.shyam.pandey@amd.com,
	tomi.valkeinen@ideasonboard.com, marex@denx.de
Subject: Re: [RFC PATCH] dmaengine: xilinx_dma: Fix per-channel direction reporting via device_caps
Date: Mon, 16 Mar 2026 23:35:52 +0100	[thread overview]
Message-ID: <95f13b52-41a4-409c-91c4-20141e208596@nabladev.com> (raw)
In-Reply-To: <DH2D8WNRXPUD.1205964NAEFPF@folker-schwesinger.de>

On 3/14/26 9:35 AM, Folker Schwesinger wrote:
> On Mon Mar 9, 2026 at 8:28 AM CET, Rahul Navale wrote:
>> I have applied provided patch (with kept RFC patch and debug stuff) and with
>> 7e01511443c3 applied. logs:
>>
>> root@pdm3:~# dmesg | grep ptr_res
>> [  198.997591] ptr_res: ptr = 0x00000000
>> ...
>> [  199.242820] ptr_res: ptr = 0x00000000
>>
>> Also I have applied provided patch (with kept RFC patch and debug stuff) and with
>> 7e01511443c3 reverted. logs:
>>
>> root@pdm3:~# dmesg | grep ptr_res
>> [   60.480754] ptr_res_no: ptr = 0x00000000
>> ...
>> [   60.600877] ptr_res_no: ptr = 0x00001770
>> ...
>> [   60.725869] ptr_res_no: ptr = 0x00002ee0
>> ...
>> [   60.850877] ptr_res_no: ptr = 0x00000000
>> ...
>> [   60.975869] ptr_res_no: ptr = 0x00001770
>> ...
> 
> This confirms that the residue_granularity field in dma_slave_caps,
> which gets properly set since 7e01511443c3 affects progress tracking in
> the PCM DMAEngine layer. Since Xilinx DMA advertises residue reporting
> with segment granularity [1], PCM DMAEngine switches from software based
> [2][3] progress tracking to hardware based progress tracking [4].
>  From my understanding however, residue reporting of the Xilinx DMA is
> incompatible with what the PCM DMAEngine expects. So the progression
> pointer is stuck at 0.
> 
> As I'm neither an expert in the PCM subsystem nor very familiar with
> residue reporting of the AXIDMA (and its limitations), I can't propose a
> solution that fixes the issue for you. I did a quick check of the code to
> see, if there is any way to force the DMAEngine PCM layer into software
> tracking from your custom driver. But I think there's no API to
> force-set the SND_DMAENGINE_PCM_FLAG_NO_RESIDUE bit in
> dma_engine_pcm->flags from your custom driver.
> Maybe there's a way to establish compatibility between PCM and AIXDMA in
> this regard. But to figure that out, I think more eyes on the issue from
> the audio experts and Xilinx/AMD engineers familiar with AXIDMA residue
> reporting would be needed.
> 
> Just to double check, and to make sure the regression you're seeing is
> not a combination of any additional, yet unknown side-effects, could you
> perform one more test?
> In dmaengine_pcm_pointer() (the function we just patched), could you
> replace the call to snd_dmaengine_pcm_pointer() with
> snd_dmaengine_pcm_pointer_no_residue() while keeping 7e01511443c3 active
> and test if this fixes your issue or not?
> 
> [1]: https://elixir.bootlin.com/linux/v6.19.3/source/drivers/dma/xilinx/xilinx_dma.c#L3284
> [2]: https://elixir.bootlin.com/linux/v7.0-rc3/source/sound/core/pcm_dmaengine.c#L136
> [3]: https://elixir.bootlin.com/linux/v7.0-rc3/source/sound/core/pcm_dmaengine.c#L235
> [4]: https://elixir.bootlin.com/linux/v7.0-rc3/source/sound/core/pcm_dmaengine.c#L251

I came to the same conclusion, that the residue handling is broken in 
the Xilinx DMA driver for cyclic transfers, and the fix is below, with 
two extra fixes on top:

https://lore.kernel.org/dmaengine/20260316221943.160375-1-marex@nabladev.com/
https://lore.kernel.org/dmaengine/20260316221728.160139-1-marex@nabladev.com/
https://lore.kernel.org/dmaengine/20260316222530.163815-1-marex@nabladev.com/

  reply	other threads:[~2026-03-16 22:35 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-17 18:49 Folker Schwesinger
2026-02-20  9:14 ` Rahul Navale
2026-02-20  9:30   ` Pandey, Radhey Shyam
2026-02-20 13:28 ` Rahul Navale
2026-02-20 19:09   ` Folker Schwesinger
2026-02-24  9:30 ` Rahul Navale
2026-02-24 15:10   ` Folker Schwesinger
2026-02-26  7:35 ` Rahul Navale
2026-02-26 20:06   ` Folker Schwesinger
2026-02-26  8:02 ` Rahul Navale
2026-03-02  7:24 ` Rahul Navale
2026-03-03 20:09   ` Folker Schwesinger
2026-03-03 20:19     ` Folker Schwesinger
2026-03-04  8:35 ` Rahul Navale
2026-03-04 14:49   ` Folker Schwesinger
2026-03-05  7:23 ` Rahul Navale
2026-03-05  8:22   ` Folker Schwesinger
2026-03-05  8:29 ` Rahul Navale
2026-03-05  8:32   ` Folker Schwesinger
2026-03-05 11:27 ` Rahul Navale
2026-03-06 10:38   ` Folker Schwesinger
2026-03-09  7:28 ` Rahul Navale
2026-03-14  8:35   ` Folker Schwesinger
2026-03-16 22:35     ` Marek Vasut [this message]
2026-03-14  8:45 ` Folker Schwesinger
2026-03-17 10:49 ` Rahul Navale
2026-03-17 17:20   ` Marek Vasut
2026-03-18 12:35 ` Rahul Navale
2026-03-27 14:51   ` Marek Vasut
2026-03-25 14:22 ` Rahul Navale
2026-03-27 11:43   ` Michal Simek
2026-03-30 12:21 ` Rahul Navale

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