Re: [PATCH 2/2] arm64: dts: qcom: nord: add CoreSight debug nodes

[Jie Gan <jie.gan@oss.qualcomm.com>]

On 10/15/2026 10:18 PM, Konrad Dybcio wrote:
> On 9/22/26 12:08 PM, Shawn Guo wrote:
>> From: Jie Gan <jie.gan@oss.qualcomm.com>
>>
>> Add the CoreSight trace topology for the Qualcomm Nord SoC: CTCU, STM,
>> TPDM/TPDA sources and aggregators, funnels, replicators, TMC ETR/ETF
>> sinks, TNoC/ITNoC nodes and per-subsystem CTIs. This wires up trace
>> sources for SOCCP, BCV/IMH/DPM, GCC, QM, DL_NOC, the CDSP NSP0-3
>> clusters, DLMM, EVA, MDSS0/1, LPASS and the AOSS SWAO priority TPDMs,
>> plus the DDR0-3 channel and LLCC TPDMs, all funneled through the
>> tn_ag aggregator into the main CoreSight funnel and out to the AOSS
>> sink.
>>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
>> ---
> 
> 
>> +	tpdm-nsp0-cdsp-llm {
>> +		compatible = "qcom,coresight-static-tpdm";
>> +		label = "tpdm_nsp0_cdsp_llm";
>> +
>> +		qcom,cmb-element-bits = <32>;
>> +
>> +		out-ports {
>> +			port {
>> +				nsp0_tpdm0_out: endpoint {
>> +					remote-endpoint = <&nsp0_tpda_in0>;
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>> +	tpdm-nsp0-cdsp-llm-2 {
>> +		compatible = "qcom,coresight-static-tpdm";
>> +		label = "tpdm_nsp0_cdsp_llm_2";
> 
> GPT points out you have a separator befoer the '2' here, but not in other places

skipped '1' here, we can rename the node to llm-1 to avoid misunderstanding.

Thanks,
Jie

> 
> Konrad