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From: Pufan Jin <cyan2254650260@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Rob Herring <robh@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1
Date: Tue, 10 Nov 2026 04:48:35 +0800	[thread overview]
Message-ID: <9a73588a-f5ac-4c9f-bb83-97224173aee7@gmail.com> (raw)
In-Reply-To: <f2663951-aa1a-44de-87cc-8e7b105e1036@lunn.ch>

On 2026/11/10 03:55, Andrew Lunn wrote:

> On Tue, Nov 10, 2026 at 03:15:15AM +0800, Pufan Jin wrote:
>> The LubanCat 4 PCB adds ~2ns of trace delay on both TXC and RXC, but
>> that alone is not sufficient for reliable RGMII operation.  With
>> phy-mode = "rgmii" and zero MAC delays the link comes up at 1Gbps but
>> drops ~90% of the packets; the PHY's internal TX/RX delay is required.
> Sorry, but this does not make sense. 4ns of delay is 2ns too many.
>
> You need a proper explanation of what is going on here.
>
>      Andrew

Hi Andrew,

The old comment was wrong. Here is what is actually happening on the
board, with measurements.

Conf A: phy-mode = "rgmii", no tx_delay/rx_delay in the DT.
dwmac-rk programs its defaults tx_delay = 0x30, rx_delay = 0x10; the
PHY's internal delays are disabled. On the board's direct 1Gbps link:

   host -> board ping:  200 sent, 20 received, 90% loss
   board -> host ping:  200 sent, 19 received, 90.5% loss
   mmc_rx_crc_error:    118

Conf B: phy-mode = "rgmii-id".
dwmac-rk programs (0, 0) into the MAC; the PHY inserts its internal
2ns TX/RX delays. On the same direct link:

   host -> board ping:  200/200, 0% loss
   board -> host ping:  200/200, 0% loss
   iperf3 TX:           921 Mbps
   iperf3 RX:           941 Mbps
   mmc_rx_crc_error:    0

The vendor BSP DTS for this board is:

     phy-mode = "rgmii-rxid";
     tx_delay = <0x1b>;
     /* rx_delay = <0x00>; */
     rtl8211f,tx-delay = <0x1b>;

The vendor configures an explicit MAC TX delay and PHY TX/RX delays.
The mainline RTL8211F driver only supports the standard 2ns TX/RX
enable selected by phy-mode; it cannot program the vendor's
fine-grained rtl8211f,tx-delay. With "rgmii-id" the PHY provides the
2ns TX/RX clock delay and the MAC delays are zero, which is the tested
mainline configuration.

The "PCB adds ~2ns" text was never measured and is removed. I will
follow up with a v2 containing the corrected comment and these
measurements.

Pufan


      reply	other threads:[~2026-11-09 20:48 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-09 19:15 Pufan Jin
2026-11-09 19:55 ` Andrew Lunn
2026-11-09 20:48   ` Pufan Jin [this message]

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